TCC720 Datasheet, PDF (73/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
USB CONTROLLER
Preliminary Spec 0.51
Endpoint Interrupt Register (UBEIIR)
0x80000508
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
- - - - - EP2 EP1 EP0
EP[2:0] [2:0]
if bit n is 1
Type
R
EP Interrupt Flag
Indicates that the USB EP interrupt has been generated
USB Interrupt Register (UBIR)
0x80000518
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
- - - - - RST RSM SP
RST [2]
1
Type
R
Reset Interrupt Flag
Indicates that the USB has received reset signaling
RSM [1]
1
Type
R
Resume Interrupt Flag
Indicates that the USB has received resume signaling in
suspend mode
SP [0]
1
Type
R
Suspend Interrupt Flag
Indicates that the USB has received suspend signalizing
Suspend signal is implicit signal that is generated if there is no
activity for 3ms.
The USB controller has two interrupt registers: Endpoint interrupt register and USB interrupt register.
These registers act as status registers when interrupt is generated. Once interrupt generated, it is
needed to read all the interrupt registers and write back to all the registers to clear the interrupt. The
endpoint interrupt register UBEIR has three bit fields that correspond to the respective endpoints.
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