TCC720 Datasheet, PDF (131/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
BOOTING PROCEDURE
Preliminary Spec 0.51
14 BOOTING PROCEDURE
In the TCC720, there is a internal boot ROM for system initialization process. It contains the
fundamental routines for system initialization or firmware upgrading through various interface
such as UART, HPI(Host Port Interface) BUS.
There are 8 modes for booting procedure. It is selected by the state of GPIO_A[10:8] at
nRESET going to high. The following table represents the boot mode of TCC720.
Table 14.1 Booting Mode of TCC720
BM
Description
1
F/W download from UART interface with XIN clock source
2
F/W download from UART interface with XTIN clock source
3
NAND boot with non-security
NAND must be attached to chip select 2, and use only XD[7:0]
4
NAND boot with security
NAND must be attached to chip select 2, and use only XD[7:0]
5
NOR boot with security
NOR must be attached to chip select 3, and bus width can be configured by BW
6
HPI boot
Processing for HPI bus cycle from HOST processor
7
Development mode
JTAG and SDRAM is enabled, and the base address of SDRAM is set to 0.
The TCC720 is waiting for JTAG connection while toggling the GPIO_A[0] output.
0
External boot
External ROM must be attached to chip select 3
14 - 1