TCC720 Datasheet, PDF (30/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
DAI & CDIF
Preliminary Spec 0.51
3.2 CDIF
The TCC720 provides CD-ROM interface for feasible implementation of CD-ROM application
such as CD-MP3 player. The CDIF supports the industry standard IIS format and the LSB
justified format that is used as the most popular format for CD-ROM interface by Sony and
Samsung. The CDIF has three pins for interface; CBCLK, CLRCK, CDAI that are multiplexed
with GPIO_B14, GPIO_B15 and GPIO_B16, respectively. The CBCLK is the bit clock input
pins of which frequency can be programmed by CICR for selection of 48fs and 32fs. The
CLRCK is the frame clock input pin that indicates the channel of CD digital audio data. The
CDAI is the input data pin.
The CDIF has three registers; CDDI_0, CDDI_1 and CICR. The CDDI_0 and the CDDI_1 are
the banked read only registers for access of data input buffer. The data input buffer is
composed of four 32 bit wide registers of which upper 16 bit is left channel data and lower is
right channel data. The CDIF receive the serial data from CDAI pin and store the data into the
buffer through the serial to parallel register. Whenever the half of buffer is filled, the receive
interrupt is generated. Only the half of input buffer can be accessible through the CDDI_0 and
the CDDI_1.
CDIF Register Map (Base Address = 0x80000000)
Name Address Type
Reset
Description
CDDI_0 0x80
R
CD Digital Audio Input Register 0
CDDI_1 0x84
R
CD Digital Audio Input Register 1
CICR
0x88 R/W 0x0000 CD Interface Control Register
CD Data Input (CDDI0)
0x80000080
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Left Channel Data
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Right Channel Data
CD Data Input (CDDI1)
0x80000084
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Left Channel Data
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Right Channel Data
3-8