TCC720 Datasheet, PDF (65/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
CLOCK GENERATOR
Preliminary Spec 0.51
GCLK (GSIO) Control Register (GCLKmode)
0x80000428
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
DIVG 0 0
GC_PHASE[5:0]
DIVG [9:8]
0
1
2, 3
GCLK Divisor Clock Select
use XIN pin as a divisor clock of GCLK generator
use PLL output as a divisor clock of GCLK generator
use XTIN pin as a divisor clock of GCLK generator
GC_PHASE [5:0]
GCLK Clock Frequency Select
gc (!= 0)
f_GC = f_DIV * gc / 2⁶
0
f_GC = f_DIV
*) The divisor clock is selected by DIVG field of GCLKmode.
7 - 12