TCC720 Datasheet, PDF (61/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
CLOCK GENERATOR
Preliminary Spec 0.51
EXTCLK Control Register (EXTCLKmode)
0x80000414
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DIVXT
EX_PHASE[13:0]
DIVXT [15:14]
0
1
2, 3
EXTCLK Divisor Clock Select
use XIN pin as a divisor clock of EXTCLK generator
use PLL output as a divisor clock of EXTCLK generator
use XTIN pin as a divisor clock of EXTCLK generator
EX_PHASE [13:0]
EXTCLK Clock Frequency Select
e (!= 0)
f_EXTCLK = f_DIV * e / 2¹⁴
0
f_EXTCLK = f_DIV
*) The divisor clock is selected by DIVXT bit of EXTCLKmode. EXTCLK is also controlled by EXT bit of
CKCTRL register that can enable or disable EXTCLK. If this bit is set to high, EXTCLK is disabled and if it
is low, EXTCLK is enabled.
External clock is user-programmable clock that can be used various purposes, it is not used by
internal peripherals, and by setting GPIO registers, GPIO_B24 pin can output this clock to user
application board. Care must be taken not to use too high frequency that the GPIO_B24 pin
cannot cope with this signals, or the GPIO_B24 pin show no clock signal out.
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