TCC720 Datasheet, PDF (135/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
BOOTING PROCEDURE
Preliminary Spec 0.51
14.3 NAND Boot
There are 2 modes in TCC720 for booting from NAND flash. One is booting from NAND flash
containing a pure F/W code, the other is booting from one containing an encrypted F/W code.
This can be selected by setting GPIO_A[10:8] appropriately as described in table 14.1.
The NAND flash is considered to be connected with nCS2, and the bus width is 8 bit regardless
of bus width configuration through GPIO_A[5:4].
The supported NAND flash types are as follows.
Size (bytes)
1M
2M
4M
8M
16M
32M
64M
128M
256M
Table 14.2 Supported NAND flash types
Size of Page (bytes) Number of Page CADR*
128
4K
3
256
4K
3
256
8K
3
512
8K
3
512
16K
3
512
32K
3
512
64K
4
512
128K
4
2048
64K
5
Device ID
6E
EA / 64
E3 / E5
E6
73
75
76
79
AA / DA
At first, TCC720 checks if the second byte of each spare area is ‘0xC4’ or not starting from the
last page to first page. It considers the page of containing ‘0xC4’ at the second byte in that
spare area as the start page of containing the initialization codes, so it copies those codes from
NAND to internal SRAM. The amount of codes to be transferred is the size of page – 4. The last
4 bytes mean the start number of page which containing the main F/W codes. (TCC720
considers all memories as little endian. So the byte located first means least significant byte in
32bit number, and so on.)
Regardless of encryption option, this initialization codes are not encrypted, so there is no need
of decryption and TCC720 directly jump to the code just copied to internal SRAM(0x00000000).
At this point, the register R0 contains the number of start page that contains the main F/W
codes, and R5 contains page size. If you want change these value, modify these registers
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