TCC720 Datasheet, PDF (124/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
MEMORY CONTROLLER
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
Preliminary Spec 0.51
13.4 External Memory Controller
External memory controller can control external memories such as NAND or NOR type flash
memory and ROM, SRAM type memory. These memories are selected by nCS3 ~ nCS0 pins.
The cycle parameter for accessing external memory can be configured by internal registers. In
case of NAND flash, additional parameters for address, command, data cycles are provided.
External Chip Select n Configuration Register (CSCFGn)
0xF0000010 + n*4
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
EPW BW
MTYPE
CSBASE
URDY RDY
0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 AMSK PSIZE
CLADR
STP
PW
HLD
*) The reset value means the following configuration for each chip select.
Chip Select 0 : 16bit, SRAM, Base = 0x40000000, tSTP=0, tPW=1, tHLD=1
Chip Select 1 : 32bit, IDE, Base = 0x50000000, not use Ready, tSTP=2, tPW=4, tHLD=2
Chip Select 2 : 32bit, NAND, Base = 0x60000000, AMSK=1, PSIZE=1, cLADR=3, tSTP=2, tPW=4, tHLD=2
Chip Select 3 : 16bit, NOR, Base = 0x70000000, tSTP=2, tPW=4, tHLD=2
*bw [27:26]
Bus Width Select
0, 1
Bus width = 32 bit
2
Bus width = 16 bit
3
Bus width = 8 bit
*) The bw is determined by xoring the BW field of CSCFGn register with the BW field of MCFG register.
MTYPE [25:24]
Type of External Memory
0
NAND type
1
IDE type
2
SMEM_0 type (Byte write is not permitted. Ex : ROM, NOR flash)
3
SMEM_1 type (Byte write is permitted. Ex : SRAM)
CSBASE [23:20]
Chip Select n Base Address
M
Indicates the MSB 4bit of nCS[n] area.
That is nCS[n] base = M * 0x10000000
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