TCC720 Datasheet, PDF (41/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
TIMER / COUNTER
Preliminary Spec 0.51
Timer/Counter n Configuration Register (TCFGn)
15 14 13 12 11 10 9 8 7
0
CC POL
654
TCKSEL
0x800002n0
3210
IEN PWM CON EN
CC [8]
0
1
TCNTn hold its value.
TCNTn is cleared to zero.
Clear Count
POL [7]
0
1
TCK Polarity
TCNTn is incremented at rising edge of the selected counting clock
TCNTn is incremented at falling edge of the selected counting clock
TCKSEL [6:4]
TCK Select
k=0~4
TCK is internally generated from divider circuit. It is driven by PCLK, and this
value determines the division factor of this circuit. Division factor is 2^(k+1).
k = 5, 6
TCK is internally generated from divider circuit. It is driven by PCLK, and this
value determines the division factor of this circuit. Division factor is 2^2k
k=7
TCK is the external pin shared by external interrupt signal. In TCC721, there
are 4 external pins for this purpose, so this configuration is valid only for
timer/counter 3 ~ 0. (not for timer/counter 5, 4)
IEN [3]
1
Interrupt Enable
Timer/Counter interrupt is enabled
PWM [2]
1
PWM Mode Enable
Timer/Counter Output is changed at every time the TCNTn is equal to
TREFn and TMREFn value. It can be used to generate PWM waveform, by
changing TMREFn while fixing TREFn. (where, TREFn > TMREFn)
CON [1]
0
1
Continue Counting
TCNTn is stop counting at the time TCNTn is equal to TREFn
When the TCNTn is reached to TREFn, TCNTn continues counting from 0 at
the next pulse of selected clock source
EN [0]
1
Timer/Counter Enable
Timer counter is enabled. TCNTn value is cleared at the same time.
5-3