TCC720 Datasheet, PDF (69/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
USB CONTROLLER
Preliminary Spec 0.51
8 USB (Universal Serial Bus) CONTROLLER
8.1 Overview
The TCC720 supports a fully compliant to USB 1.1 specification, full-speed (12 Mbps) functions
and suspend/resume signaling. The USB controller is compatible with both OpenHCI and Intel
UHCI standards. The USB function controller has an endpoint EP0 for control and two
in/output endpoints EP1/EP2 for bulk data transaction. The endpoint EP0 has a single 16 byte
FIFO; Max packet size is 16 bytes. And the endpoint EP1 and EP2 have a dual 128 byte FIFO,
respectively; Max packet size of EP1 and EP2 is 64 bytes.
There are 4 types of internal registers; IN_CSR (IN Control Status Register), OUT_CSR (OUT
Control Status Register), IN_MAXP (IN Maximum Packet size Register), and OUT WRITE
COUNT. Interrupt (Status) and Interrupt Enable registers are broken down into 2 banks:
Endpoint Interrupts, USB Interrupts. The MAXP, ENDPOINT INTERRUPT and ENDPOINT
INTERRUPT ENABLE registers are used regardless of the direction of the endpoint. The
associated CSR registers correspond to the direction of endpoint.
8-1