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TCC720 Datasheet, PDF (122/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player
TCC720
MEMORY CONTROLLER
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
Preliminary Spec 0.51
Miscellaneous Configuration Register (MCFG)
0xF0000008
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RDY 0 0
BW
BM
0
JTEN SDEN SDS IM GPO RM
RDY [15] Type
Bus Width Flag
0
The state of READY pin is low.
R
1
The state of READY pin is high.
*) READY pin is used to extend the access cycle for the external memories, it controls directly
the cycle of external memory access by setting the URDY bit of each configuration register or
can be used as a flags by polling the state of this bit, especially it can be used as a ready signal
of NAND flash.
bw* [12:11] Type
Bus Width Flag
00, 01
The corresponding memory is configured by 32bit data bus.
10
R The corresponding memory is configured by 16bit data bus.
11
The corresponding memory is configured by 8bit data bus.
*) bw is calculated by xoring the BW field of MCFG register and BW field of CSCFGn register,
that is bw = BW(of MCFG) ^ BW(of CSCFGn). BW(of MCFG) is determined by status of
GPIO_A[5:4] at the rising edge of nRESET signal.
BM [10:8] Type
Boot Mode
000
Booting procedure begins at the external memory attached at nCS3
001
Booting for downloading firmware by UART port using XIN as main clock
010
Booting for downloading firmware by UART port using XTIN as main clock
011
Booting from NAND flash without decryption process.
100
Booting from NAND flash with decryption process.
R
101
Booting from NOR flash with decryption process.
110
Booting from HPI bus interface.
111
Development mode: JTAG and SDRAM is enabled, and the base address
of SDRAM is set to 0. The TCC721 is waiting for JTAG connection while
toggling the GPIO_A[0] output.
*) Except the case of BM == 0, the booting sequence always starts from the internal boot ROM.
Refer to chapter of boot mode for more detailed information about booting procedure.
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