TCC720 Datasheet, PDF (120/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
MEMORY CONTROLLER
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
Preliminary Spec 0.51
SDRAM Write Cycle (Non-sequential)
SDCLK
SDnCS
nRAS
tDO
nCAS
XA
tRCD
RAS
CAS0
nWE
DQ
DQ0
DQM
DQM0
RAS
Cmd
WR
Cmd
CAS1
DQ1
DQM1
WR
Cmd
SDRAM Read Cycle (Row Actived)
SDCLK
SDnCS
nRAS
nCAS
nWE
DQ
DQM
tCL
DQ0
tCL
RD
Cmd
DQ2
DQ3
SDRAM Precharge / Refresh Cycle
SDCLK
SDnCS
nRAS
nCAS
tRP
nWE
tRD
DQ Valid
PreC
Cmd
RFR
Cmd
Figure 13.2 SDRAM Cycle Diagram
Stop
Cmd
Stop
Cmd
tRC
Memory controller
goes to IDLE state
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