TCC720 Datasheet, PDF (102/143 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC720
MISCELLANEOUS PERIPHERALS
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
Preliminary Spec 0.51
11.2 CODEC
The TCC720 has on-chip sigma delta type 16bit audio stereo CODEC for high grade digital
audio en-decoder systems. It contains various blocks such as compensation filter, digital volume
attenuator, de-emphasis filter, FIR filter, sinc filter, digital sigma-delta modulator, analog postfilter,
anti-image filter, etc.
CODEC Control Register (CDC_CTRL)
31 30 29 28 27 26 25 24 23
0
15 14 13 12 11 10 9 8 7
0
ZID ZC AIS EMP IIS
0x80000A08
22 21 20 19 18 17 16
65432
FSEL RST DA
10
AD
ZID [11]
Zero Input Detection Control
0
DAC Zero Input Detection is enabled
1
DAC Zero Input Detection is disabled
*) If the input data has the condition where the lower 4bits of the input data are DC and the
remaining upper bits are all “0” or all “1” has continued 8192 cycles of LRCK (=32fs), then zero
input is detected, and the analog postfilter output will be immediately forced to VREF.
ZC [10]
Zero Cross Enable Control
0
DAC Zero Cross Enable Control is disabled
1
DAC Zero Cross Enable Control is enabled
*) If DAC postfilter output data has the condition where it is cross VREF reference level, DAC
programmable gain amplifier control register is up-dated. It is used to improve click and pop-
noise. If ZC is 0, DAC Programmable Gain Control Register is modified by CDC_GAIN register.
AIS [9]
0
1
Analog Input Selection
LCH_IN and RCH_IN input is processed
MIC_IN input is processed
EMP [8]
De-emphasis Control
0
De-emphasis is disabled
1
De-emphasis is enabled
*) This bit is only useful when 44.1KHz mode.
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