DS80C320-MCG Datasheet, PDF (85/175 Pages) Dallas Semiconductor – High-Speed Microcontroller User Guide

High-Speed Microcontroller User’s Guide
DATA MEMORY ACCESS
As mentioned above, the High-Speed Microcontroller uses the MOVX instruction for data memory
access. This includes off-chip RAM and memory mapped peripherals needing read/write access. Several
aspects of the MOVX operation have been enhanced as compared to the original 8051. The principal
improvements are in the areas of the MOVX timing and the Data Pointer.
The MOVX instruction is used to generate read/write access to off-chip address locations. It has several
addressing modes. The first uses the MOVX @ Ri command to reach a 256 byte block, This instruction
uses the value in the designated working register to address one of 256 locations. The upper byte of the
address is supplied by the value in the Port 2 latch. A second way to access data is the Data Pointer
(DPTR). This 16-bit register provides an absolute address for data memory access. 16-bits cover the
entire 64KB area. Thus the DPTR serves as a pointer to memory. Using the DPTR, the relevant
instruction is MOVX @DPTR.
The original 8051 contained one DPTR. While this provides access to the entire memory area, it is
difficult to move data from one address to another. The High-Speed Microcontroller provides two Data
Pointers. Thus software can load both a source and a destination address. The MOVX instruction will
use the active pointer to direct the off-chip address.
The Data Pointers are called DPTR0 and DPTR1. DPTR0 is located at SFR addresses 82h and 83h.
These are the locations used by the original 8051. No modification of standard code is needed to use
DPTR0. The new DPTR is located at SFR 84h and 85h. The Data Pointer Select bit (SEL) chooses the
active pointer and is located at the LSb of the SFR location 86h. No other bits in register 86h have any
effect and are set to 0. When DPS is set to 0, the DPTR0 is active. When set to 1, DPTR1 is used.
The user switches between data pointers by toggling the SEL bit. The INC instruction is the fastest way
to accomplish this. All DPTR-related instructions use the currently selected DPTR for any activity.
Therefore only one instruction is required to switch from a source to a destination address. Using the
Dual Data Pointer saves code from needing to save source and destination addresses when doing a block
move. Once loaded, the software simply switches between DPTR0 and DPTR1. Sample code listed
below illustrates the saving from using the dual DPTR. The relevant register locations are summarized as
follows.
DPL 82h
DPH 83h
DPL1 84h
DPH1 85h
DPS 86h
Low byte original DPTR
High byte original DPTR
Low byte new DPTR
High byte new DPTR
DPTR Select (LSb)
The example program listed below was original code written for an 8051 and requires a total of 1869
machine cycles on the DS80C320. This takes 299 µs to execute at 25 MHz. The new code using the Dual
DPTR requires only 1097 machine cycles taking 175.5 µs. The Dual DPTR saves 772 machine cycles or
123.5 µs for a 64 byte block move. Since each pass through the loop saves 12 machine cycles when
compared to the single DPTR approach, larger blocks gain more efficiency using this feature.
A typical application of the Dual Data Pointer is moving data from an external RAM to a memory
mapped display. Another application would be to retrieve data from a stored table, process it using a
software algorithm, then store the result in a new table.
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