DS80C320-MCG Datasheet, PDF (19/175 Pages) Dallas Semiconductor – High-Speed Microcontroller User Guide

High-Speed Microcontroller User’s Guide
RTCD1
SPECIAL SPECIAL SPECIAL SPECIAL SPECIAL SPECIAL SPECIAL SPECIAL
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SPECIAL FUNCTION REGISTERS
Most of the unique features of the High-Speed Microcontroller family are controlled by bits in special
function registers (SFRs) located in unused locations in the 8051 SFR map. This allows for increased
functionality while maintaining complete instruction set compatibility.
The description for each bit indicates its read and write access, as well as its state after a power on reset.
Bits which are affected by a no-battery reset are also indicated. Note that many bits and registers are
unique to specific devices, and their functions will vary between different members of the High-Speed
Microcontroller family.
Port 0 (P0)
7
SFR 80h P0.7
RW-1
6
P0.6
RW-1
5
P0.5
RW-1
4
P0.4
RW-1
3
P0.3
RW-1
2
P0.2
RW-1
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
1
P0.1
RW-1
0
P0.0
RW-1
P0.7-0
Port 0. This port functions as a multiplexed address/data bus during external
memory access, and as a general purpose I/O port on devices which incorporate
internal program memory. During external memory cycles, this port will contain
the LSB of the address when ALE is high, and data when ALE is low.
Stack Pointer (SP)
7
6
SFR 81h SP.7
SP.6
RW-0 RW-0
5
SP.5
RW-0
4
SP.4
RW-0
3
SP.3
RW-0
2
SP.2
RW-1
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
1
SP.1
RW-1
0
SP.0
RW-1
SP.7-0
Bits 7-0
Stack Pointer. This stack pointer identifies the location where the stack will
begin. The stack pointer is incremented before every PUSH operation. This
register defaults to 07h after reset.
Data Pointer Low 0 (DPL)
7
6
SFR 82h PDL.7 PDL.6
RW-0 RW-0
5
PDL.5
RW-0
4
PDL.4
RW-0
3
PDL.3
RW-0
2
PDL.2
RW-0
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
1
PDL.1
RW-0
0
PDL.0
RW-0
DPL.7-0
Bits 7-0
Data Pointer Low 0. This register is the low byte of the standard 80C32 16-bit
data pointer. DPL and DPH are used to point to non-scratchpad data RAM.
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