DS80C320-MCG Datasheet, PDF (116/175 Pages) Dallas Semiconductor – High-Speed Microcontroller User Guide

PORT 0 FUNCTIONAL CIRCUITRY Figure 10-1
ADDRESS\
DATA
EXTERNAL
ADDRESS
CONTROL
High-Speed Microcontroller User’s Guide
VCC
INTERNAL
DATA BUS
DQ
Q
WRITE
ENABLE
PORT
0.n
POWER
DOWN
READ
ENABLE
READ
LATCH/PIN
PORT 2
General Purpose I/O
Devices which have internal program memory have the ability to use Port 2 for a general purpose I/O.
Data written to the port latch serves to set both level and direction of the data on the pin. When used as
an I/O port, it has complementary outputs that will drive both high and low logic levels. More detail on
the functions of these pins is provided under the description of output and input functions in this section.
Even if internal memory is present, the use of Port 2 as general purpose I/O pins is not recommended if
the device will be used to access external memory. This is because the state of the pins will be disturbed
during the memory access. It is still possible, however, to use the Port 2 latch to hold the upper address
byte for Register Indirect Addressing instructions.
Most Significant Address Byte, A8-15
When used to address expanded memory, Port 2 functions as the most significant byte of the address bus.
Port 2 must function as the address bus on ROMless devices. When serving as a bus, Port 2 will be
driven with strong drivers at all times except immediately after the rising edge of PSEN. See Figure 5-3
and 5-4 for more details.
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