DS80C320-MCG Datasheet, PDF (33/175 Pages) Dallas Semiconductor – High-Speed Microcontroller User Guide

Interrupt Enable (IE)
7
6
SFR A8h EA
ES1
RW-0 RW-0
5
ET2
RW-0
4
ES0
RW-0
High-Speed Microcontroller User’s Guide
3
ET1
RW-0
2
EX1
RW-0
1
ET0
RW-0
0
EX0
RW-0
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
EA
Bit 7
Global Interrupt Enable. This bit controls the global masking of all interrupts
except Power-Fail Interrupt, which is enabled by the EPFI bit (WDCON.5).
0 = Disable all interrupt sources. This bit overrides individual interrupt mask
settings.
1 = Enable all individual interrupt masks. Individual interrupts will occur if
enabled.
ES1
Bit 6
ET2
Bit 5
ES0
Bit 4
Enable Serial Port 1 Interrupt. This bit controls the masking of the serial port
1 interrupt.
0 = Disable all serial port 1 interrupts.
1 = Enable interrupt requests generated by the RI_1 (SCON1.0) or TI_1
(SCON1.1) flags.
Enable Timer 2 Interrupt. This bit controls the masking of the Timer 2
interrupt.
0 = Disable all Timer 2 interrupts.
1 = Enable interrupt requests generated by the TF2 flag (T2CON.7).
Enable Serial Port 0 Interrupt. This bit controls the masking of the serial port
0 interrupt.
0 = Disable all serial port 0 interrupts.
1 = Enable interrupt requests generated by the RI_0 (SCON0.0) or TI_0
(SCON0.1) flags.
ET1
Bit 3
EX1
Bit 2
Enable Timer 1 Interrupt. This bit controls the masking of the Timer 1
interrupt.
0 = Disable all Timer 1 interrupts.
1 = Enable all interrupt requests generated by the TF1 flag (TCON.7).
Enable External Interrupt 1. This bit controls the masking of external
interrupt 1.
0 = Disable external interrupt 1.
1 = Enable all interrupt requests generated by the INT0 pin.
ET0
Enable Timer 0 Interrupt. This bit controls the masking of the Timer 0
Bit 1
interrupt.
0 = Disable all Timer 0 interrupts.
1 = Enable all interrupt requests generated by the TF0 flag (TCON.5).
EX0
Enable External Interrupt 0. This bit controls the masking of external
Bit 0
interrupt 0.
0 = Disable external interrupt 0.
1 = Enable all interrupt requests generated by the INT0 pin.
33 of 175