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DS80C320-MCG Datasheet, PDF (31/175 Pages) Dallas Semiconductor – High-Speed Microcontroller User Guide
Serial Port 0 Control (SCON0)
7
6
5
SFR 98h SM0/FE_0 SM1_0 SM2_0
RW-0 RW-0 RW-0
4
REN_0
RW-0
High-Speed Microcontroller User’s Guide
3
TB8_0
RW-0
2
RB8_0
RW-0
1
T1_0
RW-0
0
R1_0
RW-0
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
SM0-2
Bits 7-5
Serial Port Mode These bits control the mode of serial port 0. In addition the
SM0 and SM2_0 bits have secondary functions as shown below.
SM0
0
0
0
1
1
1
1
SM1 SM2 MODE
FUNCTION
0
0
0 Synchronous
0
1
1
X
0
0
0 Synchronous
1 Asynchronous
2 Asynchronous
0
1
1
0
1
1
1 Asynchronous w/ Multiprocessor
communication
3 Asynchronous
3 Asynchronous w/ Multiprocessor
communication
LENGTH
PERIOD
8 bits 12 tCLK
8 bits
10 bits
4 tCLK
Timer 1 or 2 baud rate equation
11 bits
11 bits
11 bits
64 tCLK (SMOD=0)
32 tCLK (SMOD=1)
64 tCLK (SMOD=0)
32 tCLK (SMOD=1)
Timer 1 or 2 baud rate equation
11 bits Timer 1 or 2 baud rate equation
SM0/FE_0
Bit 7
SM1_0
Bit 6
SM2_0
Bit 5
Framing Error Flag. When SMOD0 (PCON.6)=0, this bit (SM0) is used to
select the mode for serial port 0. When SMOD0 (PCON.6)=1, this bit (FE) will
be set upon detection of an invalid stop bit. When used as FE, this bit must be
cleared in software. Once the SMOD0 bit is set, modifications to this bit will not
affect the serial port mode settings. Although accessed from the same register,
internally the data for bits SM0 and FE are stored in different locations.
No alternate function.
Multiple CPU Communications. The function of this bit is dependent on the
serial port 0 mode.
Mode 0: Selects 12 tCLK or 4 tCLK period for synchronous serial port 0 data
transfers.
Mode 1: When set, reception is ignored (RI_0 is not set) if invalid stop bit
received.
Mode 2/3: When this bit is set, multiprocessor communications are enabled in
modes 2 and 3. This will prevent the RI_0 bit from being set, and an interrupt
being asserted, if the 9th bit received is not 1.
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