DS80C320-MCG Datasheet, PDF (137/175 Pages) Dallas Semiconductor – High-Speed Microcontroller User Guide

WDCON.0
High-Speed Microcontroller User’s Guide
RWT - Reset Watchdog Timer. This bit serves as the strobe for the
Watchdog function. During the time-out period, software must set
the RWT bit if the Watchdog is enabled. Failing to set the RWT
will cause a reset when the time-out has elapsed. There is no need
to set the RWT bit to a 0 because it is self-clearing.
Read/write access:
CLOCK CONTROL
All bits have unrestricted read access. POR, EWT, WDIF, and RWT require a
Timed Access write. The remaining bits have unrestricted write access.
CKCON; 8Eh
CKCON.7
WD1 - Watchdog Timer mode select bit 1. See table below for
operation.
CKCON.6
WD0 - Watchdog Timer mode select bit 0. See table below for
operation. The WD select bits determine the time-out period of the
Watchdog Timer. The timer divides the crystal frequency by a
programmable value as shown below. The divider value is
expressed in number of clock (crystal) cycles. Note that the reset
time-out is 512 clocks longer than the interrupt, regardless of
whether the interrupt is enabled.
WD1
0
0
1
1
WD0
0
1
0
1
Interrupt
Divider
2¹⁷
2²⁰
2²³
2²⁶
Reset
Divider
2¹⁷ + 512
2²⁰ + 512
2²³ + 512
2²⁶ + 512
The default Watchdog time-out is the shortest one (WD1=WD0=0). Software can change this value
easily, so this should cause no inconvenience. However, the EWT, WDIF, and RWT bits are protected
under the Timed Access procedure. This prevents software from accidentally enabling or disabling the
Watchdog. Most importantly, it prevents errant code from accidentally clearing and restarting the
Watchdog. More details are discussed in the section on Timed Access.
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