DS80C320-MCG Datasheet, PDF (61/175 Pages) Dallas Semiconductor – High-Speed Microcontroller User Guide

High-Speed Microcontroller User’s Guide
INSTRUCTION TIMING
All instructions in the High-Speed Microcontroller perform the same functions as their 80C32
counterparts. Their effect on bits, flags, and other status functions is identical. However, the timing of
each instruction is different. This applies both in absolute terms of nanoseconds for a given crystal, and
in relative terms of clocks. For absolute timing of real-time events, the timing of software loops will need
to be calculated using the data provided in Section 16, Instruction Set Details. However, timers default to
run at the older 12 clocks per timer increment and timer-based events need no modification.
The relative time of two instructions might be different in the new architecture than it was previously. For
example, both the one-byte, two-cycle “MOVX A, @DPTR” instruction and the three-byte, two-cycle
“MOV direct, direct” instruction used two cycles. In the High-Speed Microcontroller, the MOVX
instruction uses two cycles but the “MOV direct, direct” uses three cycles. While both are faster than their
original counterparts, they now have different execution times from each other because the High-Speed
Microcontroller typically uses one cycle for each byte. This is generally true for all instructions except for
MUL, DIV, MOVC, MOVX, and branch type instructions. The timing of each instruction should be
examined for familiarity with the changes. Note that a machine cycle now requires just four clocks, and
provides one ALE pulse per cycle. Many instructions require only one cycle, but some require five. In the
original architecture, all were one or two cycles except for MUL and DIV.
ADDRESSING MODES
The High-Speed Microcontroller uses the standard 8051 instruction set which is supported by a wide
range of third party assemblers and compilers. Like the 8051, the High-Speed Microcontroller uses three
memory areas. These are program memory, data memory, and Registers. Both the program and data areas
are 64KB each. They extend from 0000h to FFFFh. The register areas are located between 00h and FFh,
but do not overlap with the program and data segments. This is because the High-Speed Microcontroller
uses different modes of addressing to reach each memory segment. These modes are described below.
Program memory is the area from which all instructions are fetched. It is inherently read only. This is
because the 8051 instruction set provides no instructions that write to this area. Read/write access is for
data memory and Registers only. No special action is required to fetch from program memory. Each
instruction fetch will be performed automatically by the on-chip hardware. In versions that contain on
chip memory, the hardware will decide whether the fetch is on-chip or off-chip based on the address.
Explicit addressing modes are needed for the data memory and register areas. These modes determine
which register area is accessed or if off-chip data memory is used.
The High-Speed Microcontroller supports eight addressing modes. They are:
Register Addressing
Direct Addressing
Register Indirect Addressing
Immediate Addressing
Register Indirect Addressing with Displacement
Relative Addressing
Page Addressing
Extended Addressing
Five of the eight are used to address operands. The remainder are used for program control and
branching. When writing assembly language instructions that use arguments, the convention is
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