DS80C320-MCG Datasheet, PDF (113/175 Pages) Dallas Semiconductor – High-Speed Microcontroller User Guide

High-Speed Microcontroller User’s Guide
INTERRUPT REGISTER CONFLICTS
During normal operation there is a small but finite probability that application software may try to read or
modify a register associated with interrupt functions at the same time that the interrupt hardware is
modifying the register. In general, these hardware/software interrupt conflicts are resolved according to
the "hardware wins" philosophy: In the event of a conflict, the hardware modification of a register will
take precedence over the software action to ensure that the interrupt event is not missed.
Software should always use read-modify-write instructions when modifying registers associated with
interrupt functions. This special class of instructions evaluates and modifies register contents in a single
instruction, preventing the hardware from accidentally modifying a bit between the time it is read and
when it is written back to the register.
One specific case involves a software write to the IP, IE, EIP or EIE registers while the internal interrupt
hardware is processing an interrupt request. Interrupt sources are normally executed (i.e., the LCALL
instruction is performed) during the instruction following their detection. If an interrupt is detected during
a write to one of the previously mentioned registers, it is possible that it will be delayed for one additional
instruction. When the instruction is processed, the interrupt will incorporate the new priority and enable
values from the previous instruction. If this situation occurs it will lengthen the interrupt latency by the
length of the instruction that modified the register.
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