English
Language : 

DS001 Datasheet, PDF (99/99 Pages) Xilinx, Inc – Spartan-II FPGA Family
R
Spartan-II FPGA Family: Pinout Tables
Additional XC2S200 Package Pins (Continued)
11/02/00
FG456
VCCINT Pins
E5
E18
F6
F17
G7
G8
G9
G14
G15
G16
H7
H16
J7
J16
P7
P16
R7
R16
T7
T8
T9
T14
T15
T16
U6
U17
V5
V18
-
-
VCCO Bank 0 Pins
F7
F8
F9
F10
G10
G11
VCCO Bank 1 Pins
F13
F14
F15
F16
G12
G13
VCCO Bank 2 Pins
G17
H17
J17
K16
K17
L16
VCCO Bank 3 Pins
M16
N16
N17
P17
R17
T17
VCCO Bank 4 Pins
T12
T13
U13
U14
U15
U16
VCCO Bank 5 Pins
T10
T11
U7
U8
U9
U10
VCCO Bank 6 Pins
M7
N6
N7
P6
R6
T6
VCCO Bank 7 Pins
Additional XC2S200 Package Pins (Continued)
G6
H6
J6
K6
K7
L7
GND Pins
A1
A22
B2
B21
C3
C20
J9
J10
J11
J12
J13
J14
K9
K10
K11
K12
K13
K14
L9
L10
L11
L12
L13
L14
M9
M10
M11
M12
M13
M14
N9
N10
N11
N12
N13
N14
P9
P10
P11
P12
P13
P14
Y3
Y20
AA2
AA21
AB1
AB22
Not Connected Pins
A2
A6
A12
B11
B16
C2
D1
D4
D18
D19
E17
E19
G2
G22
L2
L19
M2
M21
R3
R20
U3
U18
V6
W4
W19
Y5
Y22
AA1
AA3
AA11
AA16
AB7
AB12 AB21
-
-
11/02/00
Revision History
Version
No.
2.0
2.1
2.2
2.3
2.4
2.5
2.8
Date
09/18/00
10/04/00
11/02/00
03/05/01
04/30/01
09/03/03
06/13/08
Description
Sectioned the Spartan-II Family data sheet into four modules. Corrected all known errors in the pinout tables.
Added notes requiring PWDN to be tied to VCCINT when unused.
Removed the Power Down feature.
Added notes on pinout tables for IRDY and TRDY.
Reinstated XC2S50 VCCO Bank 7, GND, and "not connected" pins missing in version 2.3.
Added caution about Not Connected Pins to XC2S30 pinout tables on page 76.
Added "Package Overview" section. Added notes to clarify shared VCCO banks. Updated description and links.
Updated all modules for continuous page, figure, and table numbering. Synchronized all modules to v2.8.
DS001-4 (v2.8) June 13, 2008
Product Specification
www.xilinx.com
Module 4 of 4
99