DS001 Datasheet, PDF (86/99 Pages) Xilinx, Inc – Spartan-II FPGA Family

R
Additional XC2S100 Package Pins
TQ144
Not Connected Pins
P104 P105
-
-
-
-
11/02/00
PQ208
Not Connected Pins
P55
P56
-
-
-
-
11/02/00
FG256
V_CCINT Pins
C3
C14
D4
D13
E5
E12
M5
M12
N4
N13
P3
P14
V_CCO Bank 0 Pins
E8
F8
-
-
-
-
V_CCO Bank 1 Pins
E9
F9
-
-
-
-
V_CCO Bank 2 Pins
H11
H12
-
-
-
-
V_CCO Bank 3 Pins
J11
J12
-
-
-
-
V_CCO Bank 4 Pins
L9
M9
-
-
-
-
V_CCO Bank 5 Pins
L8
M8
-
-
-
-
V_CCO Bank 6 Pins
J5
J6
-
-
-
-
V_CCO Bank 7 Pins
H5
H6
-
-
-
-
GND Pins
A1
A16
B2
B15
F6
F7
F10
F11
G6
G7
G8
G9
G10
G11
H7
H8
H9
H10
J7
J8
J9
J10
K6
K7
K8
K9
K10
K11
L6
L7
L10
L11
R2
R15
T1
T16
Not Connected Pins
P4
R4
-
-
-
-
11/02/00
FG456
V_CCINT Pins
E5
E18
F6
F17
G7
G8
G9
G14
G15
G16
H7
H16
J7
J16
P7
P16
R7
R16
T7
T8
T9
T14
T15
T16
U6
U17
V5
V18
-
-
V_CCO Bank 0 Pins
Spartan-II FPGA Family: Pinout Tables
Additional XC2S100 Package Pins (Continued)
F10
F7
F8
F9
G10
G11
V_CCO Bank 1 Pins
F13
F14
F15
F16
G12
G13
V_CCO Bank 2 Pins
G17
H17
J17
K16
K17
L16
V_CCO Bank 3 Pins
M16
N16
N17
P17
R17
T17
V_CCO Bank 4 Pins
T12
T13
U13
U14
U15
U16
V_CCO Bank 5 Pins
T10
T11
U10
U7
U8
U9
V_CCO Bank 6 Pins
M7
N6
N7
P6
R6
T6
V_CCO Bank 7 Pins
G6
H6
J6
K6
K7
L7
GND Pins
A1
A22
B2
B21
C3
C20
J9
J10
J11
J12
J13
J14
K9
K10
K11
K12
K13
K14
L9
L10
L11
L12
L13
L14
M9
M10
M11
M12
M13
M14
N9
N10
N11
N12
N13
N14
P9
P10
P11
P12
P13
P14
Y3
Y20
AA2
AA21
AB1
AB22
Not Connected Pins
A2
A4
A5
A6
A12
A13
A14
A15
A17
B3
B6
B8
B11
B14
B16
B19
C1
C2
C8
C9
C12
C18
C22
D1
D4
D5
D10
D18
D19
D21
E4
E11
E13
E15
E16
E17
E19
E22
F4
F11
F22
G2
G3
G4
G19
G22
H1
H21
J1
J3
J4
J19
J20
K2
K18
K19
L2
L5
L18
L19
M2
M6
M17
M18
M21
N1
N5
N19
P1
P5
P19
P22
R1
R3
R20
R22
T5
T19
U3
U11
U18
V1
V2
V10
V12
V17
V3
V4
V6
V8
V20
V21
V22
W4
W5
W9
W13
W14
W15
W16
W19
Y5
Y14
Y18
Y22
AA1
AA3
AA6
AA9
AA10 AA11 AA16 AA17 AA18
AA22
AB3
AB4
AB7
AB8
AB12
AB14 AB21
-
-
-
-
11/02/00
DS001-4 (v2.8) June 13, 2008
Product Specification
www.xilinx.com
Module 4 of 4
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