DS001 Datasheet, PDF (85/99 Pages) Xilinx, Inc – Spartan-II FPGA Family

R
XC2S100 Device Pinouts (Continued)
XC2S100 Pad
Name
Function Bank TQ144 PQ208 FG256
FG456
Bndry
Scan
I/O
I/O, V_REF
GND
I/O
I/O
I/O
I/O
I/O
I/O
V_CCINT
V_CCO
GND
I/O
I/O, V_REF
I/O
I/O
I/O
I/O
I/O, V_REF
V_CCO
GND
I/O
I/O
I/O
I/O
I/O
I/O
TCK
V_CCO
V_CCO
04/18/01
0
-
P188 A6
C10 107
0 P12 P189 B7
A9
110
-
-
P190 GND* GND*
-
0
-
P191 C8
B9
113
0
-
P192 D7
E10 116
0
-
P193 E7
A8
122
0
-
-
-
D9
125
0 P11 P194 C7
E9
128
0 P10 P195 B6
A7
131
-
P9 P196 V_CCINT* V_CCINT* -
0
-
P197 V_CCO V_CCO
-
Bank 0* Bank 0*
-
P8 P198 GND* GND*
-
0
P7 P199 A5
B7
134
0
P6 P200 C6
E8
137
0
-
-
-
D8
140
0
-
P201 B5
C7
143
0
-
-
D6
D7 146
0
-
P202 A4
D6
152
0
P5 P203 B4
C6
155
0
-
-
V_CCO V_CCO
-
Bank 0* Bank 0*
-
-
-
GND* GND*
-
0
-
P204 E6
B5
158
0
-
-
D5
E7
161
0
-
-
-
E6
164
0
P4 P205 A3
B4
167
0
-
-
C5
A3
170
0
P3 P206 B3
C5 176
-
P2 P207 C4
C4
-
0
P1 P208 V_CCO V_CCO
-
Bank 0* Bank 0*
7 P144 P208 V_CCO V_CCO
-
Bank 7* Bank 7*
Notes:
1. IRDY and TRDY can only be accessed when using Xilinx PCI
cores.
2. Pads labelled GND*, V_CCINT*, V_CCO Bank 0*, V_CCO Bank 1*,
V_CCO Bank 2*, V_CCO Bank 3*, V_CCO Bank 4*, V_CCO Bank 5*,
V_CCO Bank 6*, V_CCO Bank 7* are internally bonded to
independent ground or power planes within the package.
3. See "VCCO Banks" for details on V_CCO banking.
DS001-4 (v2.8) June 13, 2008
Product Specification
www.xilinx.com
Spartan-II FPGA Family: Pinout Tables
Module 4 of 4
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