DS001 Datasheet, PDF(81/99 Page) Xilinx, Inc – Spartan-II FPGA Family

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DS001 Datasheet, PDF (81/99 Pages) Xilinx, Inc – Spartan-II FPGA Family

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Spartan-II FPGA Family: Pinout Tables

Additional XC2S50 Package Pins (Continued)

PQ208

Not Connected Pins

P55

P56

-

-

-

-

11/02/00

FG256

VCCINT Pins

C3

C14

D4

D13

E5

E12

M5

M12

N4

N13

P3

P14

VCCO Bank 0 Pins

E8

F8

-

-

-

-

VCCO Bank 1 Pins

E9

F9

-

-

-

-

VCCO Bank 2 Pins

H11

H12

-

-

-

-

VCCO Bank 3 Pins

J11

J12

-

-

-

-

VCCO Bank 4 Pins

L9

M9

-

-

-

-

VCCO Bank 5 Pins

L8

M8

-

-

-

-

VCCO Bank 6 Pins

J5

J6

-

-

-

-

VCCO Bank 7 Pins

H5

H6

-

-

-

-

GND Pins

A1

A16

B2

B15

F6

F7

F10

F11

G6

G7

G8

G9

G10

G11

H7

H8

H9

H10

J7

J8

J9

J10

K6

K7

K8

K9

K10

K11

L6

L7

L10

L11

R2

R15

T1

T16

Not Connected Pins

P4

R4

-

-

-

-

11/02/00

XC2S100 Device Pinouts

XC2S100 Pad

Name

Function Bank TQ144 PQ208 FG256

FG456

Bndry

Scan

GND

- P143 P1 GND* GND*

-

TMS

I/O

I/O

I/O

I/O

- P142 P2

D3

D3

-

7 P141 P3

C2

B1

185

7

-

-

A2

F5

191

7 P140 P4

B1

D2 194

7

-

-

-

E3

197

I/O

I/O

GND

VCCO

I/O, VREF

7

-

-

E3

G5 200

7

-

P5

D2

F3

203

-

-

-

GND* GND*

-

7

-

-

VCCO VCCO

-

Bank 7* Bank 7*

7 P139 P6

C1

E2

206

XC2S100 Device Pinouts (Continued)

XC2S100 Pad

Name

Function Bank TQ144 PQ208 FG256

FG456

Bndry

Scan

I/O

7

I/O

7

I/O

7

I/O

7

I/O, VREF

7

I/O

7

GND

-

VCCO

7

VCCINT

-

I/O

7

I/O

7

I/O

7

I/O

7

I/O

7

I/O

7

GND

-

I/O, VREF

7

I/O

7

I/O

7

I/O

7

I/O

7

I/O, IRDY(1) 7

GND

-

VCCO

7

VCCO

6

I/O, TRDY(1) 6

VCCINT

-

I/O

6

I/O

6

I/O

6

I/O, VREF

6

GND

-

I/O

6

I/O

6

I/O

6

I/O

6

I/O

6

I/O

6

-

-

P138

-

P137

P136

P135

-

-

P134

P133

-

-

-

-

-

P132

P131

-

P130

-

P129

P128

P127

P127

P126

P125

P124

-

P123

P122

-

-

-

-

-

P121

P120

P7

F3

E1

209

-

E2

H5 215

P8

E4

F2

218

-

-

F1

221

P9

D1

H4 224

P10 E1

G1 227

P11 GND* GND*

-

P12 VCCO VCCO

-

Bank 7* Bank 7*

P13 VCCINT* VCCINT*

-

P14 F2

H3 230

P15 G3

H2 233

-

F1

J5

236

P16 F4

J2

239

P17 F5

K5

245

P18 G2

K1

248

P19 GND* GND*

-

P20 H3

K3

251

P21 G4

K4

254

-

H2

L6

257

P22 G5

L1

260

P23 H4

L4

266

P24 G1

L3

269

P25 GND* GND*

-

P26 VCCO VCCO

-

Bank 7* Bank 7*

P26 VCCO VCCO

-

Bank 6* Bank 6*

P27

J2

M1 272

P28 VCCINT* VCCINT*

-

P29 H1

M3 281

-

J4

M4 284

P30

J1

M5 287

P31

J3

N2 290

P32 GND* GND*

-

P33 K5

N3 293

P34 K2

N4 296

P35 K1

P2

302

-

K3

P4

305

P36

L1

P3

308

P37

L2

R2 311

DS001-4 (v2.8) June 13, 2008

Product Specification

www.xilinx.com

Module 4 of 4

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