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DS001 Datasheet, PDF (49/99 Pages) Xilinx, Inc – Spartan-II FPGA Family
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Spartan-II FPGA Family: Functional Description
LVTTL
LVTTL requires no termination. DC voltage specifications
appears in Table 32 for the LVTTL standard. See "DC
Specifications" in Module 3 for the actual FPGA
characteristics.
Table 32: LVTTL Voltage Specifications
Parameter
Min
Typ
Max
VCCO
VREF
VTT
VIH
VIL
VOH
VOL
IOH at VOH (mA)
IOL at VOL (mA)
3.0
3.3
3.6
-
-
-
-
-
-
2.0
-
5.5
–0.5
-
0.8
2.4
-
-
-
-
0.4
–24
-
-
24
-
-
Notes:
1. VOL and VOH for lower drive currents sample tested.
LVCMOS2
LVCMOS2 requires no termination. DC voltage
specifications appear in Table 33 for the LVCMOS2
standard. See "DC Specifications" in Module 3 for the actual
FPGA characteristics.
Table 33: LVCMOS2 Voltage Specifications
Parameter
Min
Typ
VCCO
VREF
VTT
VIH
VIL
VOH
VOL
IOH at VOH (mA)
IOL at VOL (mA)
2.3
2.5
-
-
-
-
1.7
-
–0.5
-
1.9
-
-
-
–12
-
12
-
Max
2.7
-
-
5.5
0.7
-
0.4
-
-
AGP-2X
The specification for the AGP-2X standard does not
document a recommended termination technique. DC
voltage specifications appear in Table 34 for the AGP-2X
standard. See "DC Specifications" in Module 3 for the actual
FPGA characteristics.
Table 34: AGP-2X Voltage Specifications
Parameter
Min
Typ
Max
VCCO
VREF = N × VCCO(1)
3.0
3.3
3.6
1.17 1.32
1.48
VTT
-
-
-
VIH ≥ VREF + 0.2
1.37 1.52
-
VIL ≤ VREF – 0.2
-
1.12
1.28
VOH ≥ 0.9 × VCCO
2.7
3.0
-
VOL ≤ 0.1 × VCCO
-
0.33
0.36
IOH at VOH (mA)
Note 2
-
-
IOL at VOL (mA)
Note 2
-
-
Notes:
1. N must be greater than or equal to 0.39 and less than or
equal to 0.41.
2. Tested according to the relevant specification.
For design examples and more information on using the I/O,
see XAPP179, Using SelectIO Interfaces in Spartan-II and
Spartan-IIE FPGAs.
DS001-2 (v2.8) June 13, 2008
Product Specification
www.xilinx.com
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