DS001 Datasheet, PDF (68/99 Pages) Xilinx, Inc – Spartan-II FPGA Family

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Spartan-II FPGA Family: DC and Switching Characteristics
Revision History
Date
09/18/00
11/02/00
01/19/01
03/09/01
08/28/01
07/26/02
08/26/02
09/03/03
06/13/08
Version No.
Description
2.0
Sectioned the Spartan-II Family data sheet into four modules. Updated timing to reflect the
latest speed files. Added current supply numbers and XC2S200 -5 timing numbers. Approved
-5 timing numbers as preliminary information with exceptions as noted.
2.1
Removed Power Down feature.
2.2
DC and timing numbers updated to Preliminary for the XC2S50 and XC2S100. Industrial
power-on current specifications and -6 DLL timing numbers added. Power-on specification
clarified.
2.3
Added note on power sequencing. Clarified power-on current requirement.
2.4
Added -6 preliminary timing. Added typical and industrial standby current numbers. Specified
min. power-on current by junction temperature instead of by device type (Commercial vs.
Industrial). Eliminated minimum V_CCINT ramp time requirement. Removed footnote limiting
DLL operation to the Commercial temperature range.
2.5
Clarified that I/O leakage current is specified over the Recommended Operating Conditions for
V_CCINT and V_CCO.
2.6
Added references for XAPP450 to Power-On Current Specification.
2.7
Added relaxed minimum power-on current (I_CCPO) requirements to page 53. On page 64,
moved T_RPW values from maximum to minimum column.
2.8
Updated I/O measurement thresholds. Updated description and links. Updated all modules for
continuous page, figure, and table numbering. Synchronized all modules to v2.8.
DS001-3 (v2.8) June 13, 2008
Product Specification
www.xilinx.com
Module 3 of 4
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