DS001 Datasheet, PDF (48/99 Pages) Xilinx, Inc – Spartan-II FPGA Family

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Spartan-II FPGA Family: Functional Description
CTT
A sample circuit illustrating a valid termination technique for
CTT appear in Figure 51. DC voltage specifications appear
in Table 29 for the CTT standard. See "DC Specifications" in
Module 3 for the actual FPGA characteristics .
CTT
V_CCO = 3.3V
V_TT = 1.5V
50Ω
Z = 50
V_REF = 1.5V
DS001_51_061200
Figure 51: Terminated CTT
Table 29: CTT Voltage Specifications
Parameter
Min
Typ Max
V_CCO
2.05⁽¹⁾ 3.3
3.6
V_REF
1.35
1.5 1.65
V_TT
V_IH ≥ V_REF + 0.2
V_IL ≤ V_REF – 0.2
V_OH ≥ V_REF + 0.4
V_OL ≤ V_REF – 0.4
1.35
1.5 1.65
1.55
1.7
-
-
1.3 1.45
1.75
1.9
-
-
1.1 1.25
I_OH at V_OH (mA)
–8
-
-
I_OL at V_OL (mA)
8
-
-
Notes:
1. Timing delays are calculated based on V_CCO min of 3.0V.
PCI33_3 and PCI66_3
PCI33_3 or PCI66_3 require no termination. DC voltage
specifications appear in Table 30 for the PCI33_3 and
PCI66_3 standards. See "DC Specifications" in Module 3
for the actual FPGA characteristics.
Table 30: PCI33_3 and PCI66_3 Voltage Specifications
Parameter
Min Typ
Max
V_CCO
3.0
3.3
3.6
V_REF
-
-
-
V_TT
-
-
-
V_IH = 0.5 × V_CCO
1.5
1.65 V_CCO+ 0.5
V_IL = 0.3 × V_CCO
–0.5 0.99
1.08
V_OH = 0.9 × V_CCO
2.7
-
-
V_OL = 0.1 × V_CCO
-
-
0.36
I_OH at V_OH (mA)
Note 1
-
-
I_OL at V_OL (mA)
Note 1
-
-
Notes:
1. Tested according to the relevant specification.
PCI33_5
PCI33_5 requires no termination. DC voltage specifications
appear in Table 31 for the PCI33_5 standard. See "DC
Specifications" in Module 3 for the actual FPGA
characteristics.
Table 31: PCI33_5 Voltage Specifications
Parameter
Min
Typ
V_CCO
3.0
3.3
V_REF
-
-
V_TT
-
-
V_IH
1.425 1.5
V_IL
–0.5
1.0
V_OH
2.4
-
V_OL
-
-
I_OH at V_OH (mA)
Note 1
-
I_OL at V_OL (mA)
Note 1
-
Notes:
1. Tested according to the relevant specification.
Max
3.6
-
-
5.5
1.05
-
0.55
-
-
DS001-2 (v2.8) June 13, 2008
Product Specification
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