COP8AME9_14 Datasheet, PDF (79/102 Pages) Texas Instruments – COP8AME9 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEPROM, Temperature Sensor, 10-Bit A/D and Brownout Reset

COP8AME9, COP8ANE9
www.ti.com
SNOS930F – MARCH 2001 – REVISED MARCH 2013
Table 39. MICROWIRE/PLUS Master Mode Clock Select⁽¹⁾
SL1
SL0
0
0
0
1
1
x
(1) Where t_C is the instruction cycle clock
SK Period
2 × t_C
4 × t_C
8 × t_C
MICROWIRE/PLUS OPERATION
Setting the BUSY bit in the PSW register causes the MICROWIRE/PLUS to start shifting the data. It gets reset
when eight data bits have been shifted. The user may reset the BUSY bit by software to allow less than 8 bits to
shift. If enabled, an interrupt is generated when eight data bits have been shifted. The device may enter the
MICROWIRE/PLUS mode either as a Master or as a Slave. Figure 36 shows how two microcontroller devices
and several peripherals may be interconnected using the MICROWIRE/PLUS arrangements.
WARNING
The SIO register should only be loaded when the SK clock is in the idle phase.
Loading the SIO register while the SK clock is in the active phase, will result in
undefined data in the SIO register.
Setting the BUSY flag when the input SK clock is in the active phase while in
the MICROWIRE/PLUS is in the slave mode may cause the current SK clock for
the SIO shift register to be narrow. For safety, the BUSY flag should only be set
when the input SK clock is in the idle phase.
MICROWIRE/PLUS Master Mode Operation
In the MICROWIRE/PLUS Master mode of operation the shift clock (SK) is generated internally. The
MICROWIRE/PLUS Master always initiates all data exchanges. The MSEL bit in the CNTRL register must be set
to enable the SO and SK functions onto the G Port. The SO and SK pins must also be selected as outputs by
setting appropriate bits in the Port G configuration register. In the slave mode, the shift clock stops after 8 clock
pulses. Table 40 summarizes the bit settings required for Master mode of operation.
MICROWIRE/PLUS Slave Mode Operation
In the MICROWIRE/PLUS Slave mode of operation the SK clock is generated by an external source. Setting the
MSEL bit in the CNTRL register enables the SO and SK functions onto the G Port. The SK pin must be selected
as an input and the SO pin is selected as an output pin by setting and resetting the appropriate bits in the Port G
configuration register. Table 40 summarizes the settings required to enter the Slave mode of operation.
Table 40. MICROWIRE/PLUS Mode Settings⁽¹⁾
G4 (SO)
Config. Bit
1
0
1
0
G5 (SK)
Config. Bit
1
1
0
0
G4
Fun.
SO
TRI-
STATE
SO
TRI-
STATE
G5
Fun.
Int.
SK
Int.
SK
Ext.
SK
Ext.
SK
Operation
MICROWIRE/PLUS
Master
MICROWIRE/PLUS
Master
MICROWIRE/PLUS
Slave
MICROWIRE/PLUS
Slave
(1) This table assumes that the control flag MSEL is set.
Copyright © 2001–2013, Texas Instruments Incorporated
Submit Documentation Feedback
79
Product Folder Links: COP8AME9 COP8ANE9