COP8AME9_14 Datasheet, PDF (21/102 Pages) Texas Instruments – COP8AME9 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEPROM, Temperature Sensor, 10-Bit A/D and Brownout Reset

COP8AME9, COP8ANE9
www.ti.com
SNOS930F – MARCH 2001 – REVISED MARCH 2013
Case 2 shows a subsequent dip in the supply voltage which goes below the approximate 1.8V level. As V_CC
drops below V_bor, the internal RESET signal is asserted. When V_CC rises back above the 1.8V level, t_d is started.
Since the power supply rise time is longer for this case, t_d has expired before V_CC rises above V_bor and t_id starts
immediately when V_CC is greater than V_bor.
Case 3 shows a dip in the supply where V_CC drops below V_bor, but not below 1.8V. On-chip RESET is asserted
when V_CC goes below V_bor and t_id starts as soon as the supply goes back above V_bor.
The internal reset will not be turned off until the Idle Timer underflows. The internal reset will perform the same
functions as external reset. The device is ensured to operate at the specified frequency down to the specified
brownout voltage. After the underflow, the logic is designed such that no additional internal resets occur as long
as V_CC remains above the brownout voltage.
The device is relatively immune to short duration negative-going V_CC transients (glitches). It is essential that good
filtering of V_CC be done to ensure that the brownout feature works correctly. Power supply decoupling is vital
even in battery powered systems.
Refer to the device specifications for the actual V_bor voltage.
Under no circumstances should the RESET pin be allowed to float. If the external Reset feature is not being
used, the RESET pin should be connected directly to V_CC. The RESET input may also be connected to an
external pull-up resistor or to other external circuitry. The output of the brownout reset detector will always preset
the Idle Timer to a value between 00F0 and 00FF (240 to 256 t_C). At this time, the internal reset will be
generated.
The contents of data registers and RAM are unknown following the on-chip reset.
Figure 10. Brownout Reset Operation
Figure 11. Reset Circuit Using Power-On Reset
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