COP8AME9_14 Datasheet, PDF(37/102 Page) Texas Instruments – COP8AME9 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEPROM, Temperature Sensor, 10-Bit A/D and Brownout Reset

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COP8AME9_14 Datasheet, PDF (37/102 Pages) Texas Instruments – COP8AME9 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEPROM, Temperature Sensor, 10-Bit A/D and Brownout Reset

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COP8AME9, COP8ANE9

www.ti.com

SNOS930F â MARCH 2001 â REVISED MARCH 2013

Mode 2. External Event Counter Mode

This mode is quite similar to the processor independent PWM mode described above. The main difference is that

the timer, Tx, is clocked by the input signal from the TxA pin after synchronization to the appropriate internal

clock (tC or MCLK). The Tx timer control bits, TxC3, TxC2 and TxC1 allow the timer to be clocked either on a

positive or negative edge from the TxA pin. Underflows from the timer are latched into the TxPNDA pending flag.

Setting the TxENA control flag will cause an interrupt when the timer underflows.

In this mode the input pin TxB can be used as an independent positive edge sensitive interrupt input if the

TxENB control flag is set. The occurrence of a positive edge on the TxB input pin is latched into the TxPNDB

flag.

Figure 18 shows a block diagram of the timer in External Event Counter mode.

Note: The PWM output is not available in this mode since the TxA pin is being used as the counter input clock.

Figure 18. Timer in External Event Counter Mode

Mode 3. Input Capture Mode

The device can precisely measure external frequencies or time external events by placing the timer block, Tx, in

the input capture mode. In this mode, the reload registers serve as independent capture registers, capturing the

contents of the timer when an external event occurs (transition on the timer input pin). The capture registers can

be read while maintaining count, a feature that lets the user measure elapsed time and time between events. By

saving the timer value when the external event occurs, the time of the external event is recorded. Most

microcontrollers have a latency time because they cannot determine the timer value when the external event

occurs. The capture register eliminates the latency time, thereby allowing the applications program to retrieve the

timer value stored in the capture register.

In this mode, the timer Tx is constantly running at the fixed tC or MCLK rate. The two registers, RxA and RxB, act

as capture registers. Each register also acts in conjunction with a pin. The register RxA acts in conjunction with

the TxA pin and the register RxB acts in conjunction with the TxB pin.

The timer value gets copied over into the register when a trigger event occurs on its corresponding pin after

synchronization to the appropriate internal clock (tC or MCLK). Control bits, TxC3, TxC2 and TxC1, allow the

trigger events to be specified either as a positive or a negative edge. The trigger condition for each input pin can

be specified independently.

The trigger conditions can also be programmed to generate interrupts. The occurrence of the specified trigger

condition on the TxA and TxB pins will be respectively latched into the pending flags, TxPNDA and TxPNDB. The

control flag TxENA allows the interrupt on TxA to be either enabled or disabled. Setting the TxENA flag enables

interrupts to be generated when the selected trigger condition occurs on the TxA pin. Similarly, the flag TxENB

controls the interrupts from the TxB pin.

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