COP8AME9_14 Datasheet, PDF (12/102 Pages) Texas Instruments – COP8AME9 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEPROM, Temperature Sensor, 10-Bit A/D and Brownout Reset

COP8AME9, COP8ANE9
SNOS930F – MARCH 2001 – REVISED MARCH 2013
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Pin Functions
The COP8AME9 I/O structure enables designers to reconfigure the microcontroller's I/O functions with a single
instruction. Each individual I/O pin can be independently configured as output pin low, output high, input with
high impedance or input with weak pull-up device. A typical example is the use of I/O pins as the keyboard
matrix input lines. The input lines can be programmed with internal weak pull-ups so that the input lines read
logic high when the keys are all open. With a key closure, the corresponding input line will read a logic zero since
the weak pull-up can easily be overdriven. When the key is released, the internal weak pull-up will pull the input
line back to logic high. This eliminates the need for external pull-up resistors. The high current options are
available for driving LEDs, motors and speakers. This flexibility helps to ensure a cleaner design, with less
external components and lower costs. Below is the general description of all available pins.
V_CC and GND are the power supply pins. All V_CC and GND pins must be connected.
CKI is the clock input. This can be connected (in conjunction with CKO) to an external crystal circuit to form a
crystal oscillator. See Oscillator Description section.
RESET is the master reset input. See Reset description section.
AV_CC is the Analog Supply for A/D converter. It should be connected to V_CC externally.
AGND is the ground pin for the A/D converter. It should be connected to GND externally.
The device contains up to three bidirectional 8-bit I/O ports (B, G and L) where each individual IO may be
independently configured as an input (Schmitt trigger inputs on ports L and G), output or TRI-STATE under
program control. Three data memory address locations are allocated for each of these I/O ports. Each I/O port
has three associated 8-bit memory mapped registers, the CONFIGURATION register, the output DATA register
and the Pin input register. (See the memory map for the various addresses associated with the I/O ports.)
Figure 3 shows the I/O port configurations. The DATA and CONFIGURATION registers allow for each port bit to
be individually configured under software control as shown below:
CONFIGURATION Register
0
0
1
1
Pin Descriptions
DATA
Register
Port Set-Up
0
Hi-Z Input
(TRI-STATE Output)
1
Input with Weak Pull-Up
0
Push-Pull Zero Output
1
Push-Pull One Output
Port B is a 6-bit I/O port. All B pins have Schmitt triggers on the inputs. The 28-pin packages do not have a full 8-
bit port and contain some unbonded, floating pads internally on the chip. The binary value read from these bits is
undetermined. The application software should mask out these unknown bits when reading the Port B register, or
use only bit-access program instructions when accessing Port B. These unconnected bits draw power only when
they are addressed (i.e., in brief spikes). Additionally, if Port B is being used with some combination of digital
inputs and analog inputs, the analog inputs will read as undetermined values and should be masked out by
software.
Port B supports the analog inputs for the A/D converter. Port B has the following alternate pin functions:
B7 Analog Channel 15 or A/D Input
B6 Analog Channel 14 or Analog Multiplexor Output
B5 Analog Channel 13 or AMP1 + Input
B4 Analog Channel 12 or AMP1 − Input
B3 Analog Channel 11 or AMP1 Output
B2 Analog Channel 10
12
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