COP8AME9_14 Datasheet, PDF (18/102 Pages) Texas Instruments – COP8AME9 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEPROM, Temperature Sensor, 10-Bit A/D and Brownout Reset

COP8AME9, COP8ANE9
SNOS930F – MARCH 2001 – REVISED MARCH 2013
www.ti.com
Bit 1
= 1 HALT mode disabled.
= 0 HALT mode enabled.
Bit 0
= 1 Execution following RESET will be from Flash Memory.
= 0 Flash Memory is erased. Execution following RESET will be from Boot ROM with the MICROWIRE/PLUS
ISP routines.
The COP8 assembler defines a special ROM section type, CONF, into which the Option Register data may be
coded. The Option Register is programmed automatically by programmers that are certified by TI.
The user needs to ensure that the FLEX bit will be set when the device is programmed.
The following examples illustrate the declaration of the Option Register.
Syntax:
[label:].sect
config, conf
.db
value
;1 byte,
;configures
;options
.endsect
Example: The following sets a value in the Option Register for a COP8AME9. The Option Register bit values
shown select options: Security disabled, WATCHDOG enabled HALT mode enabled and execution will
commence from Flash Memory.
.chip
8AME
.sect
option, conf
.db
0x01
;wd, halt, flex
.endsect
...
.end
start
Note: All programmers certified for programming this family of parts will support programming of the Option
Register. Please contact TI or your device programmer supplier for more information.
SECURITY
The device has a security feature which, when enabled, prevents external reading of the Flash program memory.
The security bit in the Option Register determines, whether security is enabled or disabled. If the security feature
is disabled, the contents of the internal Flash Memory may be read by external programmers or by the built in
MICROWIRE/PLUS serial interface ISP. Security must be enforced by the user when the contents of the
Flash Memory are accessed via the user ISP or Virtual EEPROM capability.
If the security feature is enabled, then any attempt to externally read the contents of the Flash Memory will result
in the value FF (hex) being read from all program locations (except the Option Register). In addition, with the
security feature enabled, the write operation to the Flash program memory and Option Register is inhibited. Page
Erases are also inhibited when the security feature is enabled. The Option Register is readable regardless of the
state of the security bit by accessing location FFFF (hex). Mass Erase Operations are possible regardless of the
state of the security bit.
The security bit can be erased only by a Mass Erase of the entire contents of the Flash unless Flash operation is
under the control of User ISP functions.
Note: The actual memory address of the Option Register is 1FFF (hex), however the MICROWIRE/PLUS ISP
routines require the address FFFF (hex) to be used to read the Option Register when the Flash Memory is
secured.
The entire Option Register must be programmed at one time and cannot be rewritten without first erasing the
entire last page of Flash Memory.
RESET
The device is initialized when the RESET pin is pulled low or the On-chip Brownout Reset is activated.
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