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COP8AME9_14 Datasheet, PDF (54/102 Pages) Texas Instruments – COP8AME9 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEPROM, Temperature Sensor, 10-Bit A/D and Brownout Reset
COP8AME9, COP8ANE9
SNOS930F – MARCH 2001 – REVISED MARCH 2013
www.ti.com
Note that the XBIT9/PSEL0 bit located in the ENU register serves two mutually exclusive functions. This bit
programs the ninth bit for transmission when the USART is operating with nine data bits per frame. There is no
parity selection in this framing format. For other framing formats XBIT9 is not needed and the bit is PSEL0 used
in conjunction with PSEL1 to select parity.
The frame formats for the receiver differ from the transmitter in the number of Stop bits required. The receiver
only requires one Stop bit in a frame, regardless of the setting of the Stop bit selection bits in the control register.
Note that an implicit assumption is made for full duplex USART operation that the framing formats are the same
for the transmitter and receiver.
Figure 24. Framing Formats
USART INTERRUPTS
The USART is capable of generating interrupts. Interrupts are generated on Receive Buffer Full and Transmit
Buffer Empty. Both interrupts have individual interrupt vectors. Two bytes of program memory space are
reserved for each interrupt vector. The two vectors are located at addresses 0xEC to 0xEF Hex in the program
memory space. The interrupts can be individually enabled or disabled using Enable Transmit Interrupt (ETI) and
Enable Receive Interrupt (ERI) bits in the ENUI register.
The interrupt from the Transmitter is set pending, and remains pending, as long as both the TBMT and ETI bits
are set. To remove this interrupt, software must either clear the ETI bit or write to the TBUF register (thus
clearing the TBMT bit).
The interrupt from the receiver is set pending, and remains pending, as long as both the RBFL and ERI bits are
set. To remove this interrupt, software must either clear the ERI bit or read from the RBUF register (thus clearing
the RBFL bit).
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