COP8AME9_14 Datasheet, PDF (43/102 Pages) Texas Instruments – COP8AME9 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEPROM, Temperature Sensor, 10-Bit A/D and Brownout Reset

COP8AME9, COP8ANE9
www.ti.com
SNOS930F – MARCH 2001 – REVISED MARCH 2013
HALT Exit Using Reset
A device Reset, which is invoked by a low-level signal on the RESET input pin, takes the device out of the HALT
mode and starts execution from address 0000H. The initialization software should determine what special action
is needed, if any, upon start-up of the device from HALT. The initialization of all registers following a RESET exit
from HALT is described in the Reset section of this manual.
HALT Exit Using Multi-Input Wake-up
The device can be brought out of the HALT mode by a transition received on one of the available Wake-up pins.
The pins used and the types of transitions sensed on the Multi-input pins are software programmable. For
information on programming and using the Multi-Input Wake-up feature, refer to the Multi-Input Wake-up section.
A start-up delay is required between the device wake-up and the execution of program instructions, depending
on the type of chip clock. The start-up delay is mandatory, and is implemented whether or not the CLKDLY bit is
set. This is because all crystal oscillators and resonators require some time to reach a stable frequency and full
operating amplitude.
The IDLE Timer (Timer T0) provides a fixed delay from the time the clock is enabled to the time the program
execution begins. Upon exit from the HALT mode, the IDLE Timer is enabled with a starting value of 256 and is
decremented with each instruction cycle. (The instruction clock runs at one-fifth the frequency of the high speed
oscillator.) An internal Schmitt trigger connected to the on-chip CKI inverter ensures that the IDLE Timer is
clocked only when the oscillator has a large enough amplitude. (The Schmitt trigger is not part of the oscillator
closed loop.) When the IDLE Timer underflows, the clock signals are enabled on the chip, allowing program
execution to proceed. Thus, the delay is equal to 256 instruction cycles.
Note: To ensure accurate operation upon start-up of the device using Multi-Input Wake-up, the instruction in the
application program used for entering the HALT mode should be followed by two consecutive NOP (no-
operation) instructions.
Options
This device has two options associated with the HALT mode. The first option enables the HALT mode feature,
while the second option disables HALT mode operation. Selecting the disable HALT mode option will cause the
microcontroller to ignore any attempts to HALT the device under software control. Note that this device can still
be placed in the HALT mode by stopping the clock input to the microcontroller, if the program memory is masked
ROM. See the Option section for more details on this option bit.
Figure 21. Wake-up from HALT
High Speed Idle Mode
In the IDLE mode, program execution stops and power consumption is reduced to a very low level as with the
HALT mode. However, the high speed oscillator, IDLE Timer (Timer T0), T2 timer (T2HS = 1, T2IDLE = 1), and
Clock Monitor continue to operate, allowing real time to be maintained. The device remains idle for a selected
amount of time up to 65,536 instruction cycles, or 32.768 milliseconds with a 2 MHz instruction clock frequency,
and then automatically exits the IDLE mode and returns to normal program execution.
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