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CDCE62005 Datasheet, PDF (59/76 Pages) Texas Instruments – Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
CDCE62005
www.ti.com........................................................................................................................................................................................... SCAS862 – NOVEMBER 2008
Loop Filter
Figure 34 depicts the loop filter topology of the CDCE62005. It facilitates both internal and external
implementations providing optimal flexibility.
C2 R2
C1
EXT_LFP
EXT_LFN
PFD/
CP
internal
external
VB
+
-
C1
internal
external
R3
C3
R2 C2
Figure 34. CDCE62005 Loop Filter Topology
Internal Loop Filter Component Configuration
Figure 34 contains five different loop filter components with programmable values: C1, C2, R2, R3, and C3.
Table 37 shows that the CDCE62005 uses one of four different types of circuit implementation (shown in
Figure 35) for each of the internal loop filter components.
Table 37. CDCE62005 Loop Filter Component Implementation Type
Component
C1
C2
R2
R3
C3
Control Bits Used
5
5
5
2
4
Implementation Type
(see Figure 35)
a
a
c
d
b
Ceq
c.4
c.3
c.2
c.1
c. 0
(a)
Ceq
c.3
c.2
c.1
c. 0
(b)
Req
Req
r.4
r.3
r.2
r.1
r.0
(c)
r. base
r. 1
r.0
(d)
Figure 35. CDCE62005 Internal Loop Filter Component Schematics
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s) :CDCE62005
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