CDCE62005 Datasheet, PDF (35/76 Pages) Texas Instruments – Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62005
www.ti.com........................................................................................................................................................................................... SCAS862 – NOVEMBER 2008
Device Registers: Register 8
SPI RAM BIT NAME
BIT BIT
0
A0
1
A1
2
A2
3
A3
4
0 CALWORD0
5
1 CALWORD1
6
2 CALWORD2
7
3 CALWORD3
8
4 CALWORD4
9
5 CALWORD5
10 6 PLLLOCKPIN
11 7 /SLEEP
12 8 /SYNC
13 9 RESERVED
14 10 VERSION0
15 11 VERSION1
16 12 VERSION2
17 13 RESERVED
18 14 CALWORD_IN0
19 15 CALWORD_IN1
20 16 CALWORD_IN2
21 17 CALWORD_IN3
22 18 CALWORD_IN4
23 19 CALWORD_IN5
24 20 RESERVED
25 21 TITSTCFG0
26 22 TITSTCFG1
27 23 TITSTCFG2
28 24 TITSTCFG3
29 25 PRIACTIVITY
30 26 SECACTIVITY
31 27 AUXACTIVITY
Table 13. CDCE62005 Register 8 Bit Definitions
RELATED
BLOCK
Status
Status
Status
Status
Status
Status
Status
Status
Status
DESCRIPTION/FUNCTION
Address 0
Address 1
Address 2
Address 3
“VCO Calibration Word” read back from device
Read Only: Status of the PLL Lock Pin Driven by the device.
Set Device Sleep mode On when set to “0”, Normal Mode when set to “1”
If set to “0” this bit forces “/SYNC ; Set to “1” to exit the Synchronization
State.
—
Diagnostics
Diagnostics
Diagnostics
Diagnostics
Diagnostics
Diagnostics
—
Diagnostics
Diagnostics
Diagnostics
Diagnostics
Status
Status
Status
Silicon Revision
Silicon Revision
Silicon Revision
Must be set to “0”
TI Test Registers. For TI Use Only
Must be set to “0”
TI Test Registers. For TI Use Only
Synthesizer Source Indicator (27:25)
0 0 1 Primary Input
0 1 0 Secondary Input
1 0 0 Auxiliary Input
0
0
0
1
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
RAM
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s) :CDCE62005
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