English
Language : 

CDCE62005 Datasheet, PDF (13/76 Pages) Texas Instruments – Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
CDCE62005
www.ti.com........................................................................................................................................................................................... SCAS862 – NOVEMBER 2008
ELECTRICAL CHARACTERISTICS OPERATING CONDITIONS (Continued)
recommended operating conditions for the CDCE62005 device for under the specified Industrial temperature range of –40°C
to 85°C
PARAMETER
TEST CONDITIONS
SPI OUTPUT (MISO) / PLL DIGITAL (OUTPUT MODE)
IOH
High-level output current
IOL
Low-level output current
VOH
High-level output voltage for LVCMOS outputs
VOL
Low-level output voltage for LVCMOS outputs
CO
Output capacitance on MISO
IOZH
3-state output current
IOZL
PLL ANALOG ( INPUT MODE)
VCC = 3.3 V,
VO = 1.65 V
VCC = 3.3 V,
VO = 1.65 V
VCC = 3 V,
IOH = −100 µA
VCC = 3 V,
IOL = 100 µA
VCC = 3.3 V; VO = 0 V or VCC
VO = VCC
VO = 0 V
IOZH LOCK
High-impedance state output current for PLL
LOCK output(2)
VO = 3.6 V (PD is set low)
IOZL LOCK
High-impedance state output current for PLL
LOCK output
VO = 0 V (PD is set low)
VT+
Positive input threshold voltage VCC = min to
max
VT–
Negative input threshold voltage VCC c= min to
max
VBB
VBB
Termination voltage for reference inputs.
IBB = –0.2 mA, Depending on the
setting.
INPUT BUFFERS INTERNAL TERMINATION RESISTORS (PRI_IN and SEC_IN)
Termination resistance
Single ended
PHASE DETECTOR
fCPmax
Charge pump frequency
MIN
VCC–0.5
TYP(1) MAX UNIT
–30
mA
33
mA
V
0.3 V
3
pF
5
µA
–5
22
µA
–1
µA
VCC×0.55
V
VCC×0.35
V
0.9
1.9 V
50
Ω
0.04
40 MHz
(1) All typical values are at VCC = 3.3 V, temperature = 25°C
(2) Lock output has a 80kΩ pull-down resistor.
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s) :CDCE62005
Submit Documentation Feedback
13