CDCE62005 Datasheet, PDF (12/76 Pages) Texas Instruments – Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62005
SCAS862 – NOVEMBER 2008........................................................................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS OPERATING CONDITIONS
recommended operating conditions for the CDCE62005 device for under the specified Industrial temperature range of –40°C
to 85°C
PARAMETER
TEST CONDITIONS
POWER SUPPLY
V_CC
V_{CC_PLL},
V_{CC_IN},
V_{CC_VCO} &
V_CCA
P_LVPECL
P_LVDS
Supply voltage
Analog supply voltage
REF at 30.72,MHz, Outputs are LVPECL
REF at 30.72 MHz, Outputs are LVDS
P_LVCMOS REF at 30.72 MHz, Outputs are LVCMOS
Output 1 = 491.52 MHz
Output 2 = 245.76 MHz
Output 3 = 122.88 MHz
Output 4 = 61.44 MHz
Output 5 = 30.72 MHz
In case of LVCMOS
Outputs = 245.76 MHz
P_OFF
REF at 30.72 MHz
Dividers are disabled. Outputs are
disabled.
P_PD
DIFFERENTIAL INPUT MODE (PRI_IN, SEC_IN)
V_INPP
Input amplitude (V_{_IN} – V_/IN)⁽¹⁾
V_IC
Common-mode input voltage
I_IH
Differential input current high (no internal
termination)
Device is powered down
V_I = V_CC, V_CC = 3.6 V
I_IL
Differential input current low (no internal
termination)
V_I = 0 V, V_CC = 3.6 V
Input Capacitance on PRI_IN, SEC_IN
LVCMOS INPUT MODE (AUX_IN)
V_IL
Low-level input voltage LVCMOS
V_IH
High-level input voltage LVCMOS
VIK LVCMOS input clamp voltage
I_IH
LVCMOS input current
I_IL
LVCMOS input
C_I
Input capacitance (LVCMOS signals)
CRYSTAL INPUT SPECIFICATIONS
V_CC = 3 V, I_I = –18 mA
V_I = V_CC, V_CC = 3.6 V
V_I = 0 V, V_CC = 3.6 V
V_I = 0 V or V_CC
Crystal shunt capacitance
Equivalent series resistance (ESR)
LVCMOS INPUT MODE (SPI_CLK,SPI_MOSI,SPI_LE,PD,SYNC,REF_SEL, PRI_IN, SEC_IN )
Low-level input voltage LVCMOS,
High-level input voltage LVCMOS
V_IK
LVCMOS input clamp voltage
V_CC = 3 V, I_I = –18 mA
I_IH
LVCMOS input current
V_I = V_CC, V_CC = 3.6 V
I_IL
LVCMOS input (Except PRI_IN and
SEC_IN)
V_I = 0 V, V_CC = 3.6 V
I_IL
LVCMOS input (PRI_IN and SEC_IN)
V_I = 0 V, V_CC = 3.6 V
C_I
Input capacitance (LVCMOS signals)
V_I = 0 V or V_CC
MIN TYP
3 3.3
3 3.3
1.9
1.65
MAX UNIT
3.6 V
3.6
W
W
1.8
W
0.75
W
20
mW
0.1
1.3 V
1.0
V_CC–0.3 V
20 µA
–20
3
20 µA
pF
0
0.7 x V_CC
–10
0.3 x V_CC V
V_CC V
–1.2 V
300
µA
10 µA
8
pF
20 pF
50 Ω
0
0.7 x V_CC
–10
–10
0.3 x V_CC V
V_CC V
–1.2 V
20 µA
–40 µA
10 µA
3
pF
(1) V_INPP minimum and maximum is required to maintain ac specifications; the actual device function tolerates at a minimum V_INPP of
100mV.
12
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