CDCE62005 Datasheet, PDF (15/76 Pages) Texas Instruments – Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62005
www.ti.com........................................................................................................................................................................................... SCAS862 – NOVEMBER 2008
ELECTRICAL CHARACTERISTICS OPERATING CONDITIONS (Continued)^(1)(2)(3)(4)
recommended operating conditions for the CDCE62005 device for under the specified Industrial temperature range of –40°C
to 85°C
PARAMETER
TEST CONDITIONS
MIN TYP⁽⁵⁾ MAX UNIT
LVDS OUTPUT
f_clk
|V_OD|
ΔV_OD
V_OS
ΔV_OS
Output frequency
Differential output voltage
LVDS VOD magnitude change
Offset Voltage
VOS magnitude change
Short circuit Vout+ to ground
Configuration Load
R_L = 100 Ω
–40°C to 85°C
VOUT = 0
0
270
1.24
40
800 MHz
550 mV
50 mV
V
mV
27 mA
Short circuit Vout– to ground
VOUT = 0
27 mA
t_pho
Reference (PRI_IN or SEC_IN) to output
Outputs are set to 491.52 MHz
phase offset
Reference at 30.72 MHz
1.65
ns
t_pd(LH)/t_pd(HL) Propagation delay from PRI_IN or SEC_IN to Crosspoint to Crosspoint, load In Bypass
outputs
Mode
3.1
ns
t_sk(o) ⁽⁶⁾
Skew, output to output For Y0 to Y4
All Outputs set at 200 MHz
In Bypass Mode Only
Reference = 200 MHz
25
ps
C_O
I_OPDH
I_OPDL
Output capacitance on Y0 to Y4
Power down output current
Power down output current
Duty cycle
V_CC = 3.3 V; V_O = 0 V or V_CC
V_O = V_CC
V_O = 0 V
45%
5
pF
25 µA
5 µA
55%
t_r / t_f
Rise and fall time
LVCMOS-TO-LVDS
20% to 80% of V_OUT(PP)
110 160 190 ps
t_{skP_c}
Output skew between LVCMOS and LVDS
outputs ⁽⁷⁾
V_CC/2 to Crosspoint
0.9 1.4 1.9 ns
(1) This is valid only for same REF_IN clock and Y output clock frequency
(2) VINPP minimum and maximum is required to maintain ac specifications; the actual device function tolerates at a minimum VINPP of
100mV.
(3) Lock output has a 80 kΩ pull-down resistor.
(4) The phase of LVCMOS is lagging in reference to the phase of LVDS.
(5) All typical values are at V_CC = 3.3 V, temperature = 25°C
(6) The t_sk(o) specification is only valid for equal loading of all outputs.
(7) Operating the LVCMOS or LVDS output above the maximum frequency will not cause a malfunction to the device, but the output signal
swing might no longer meet the output specification
LVDS DC Termination Test
100 Ω
Oscilloscope
Copyright © 2008, Texas Instruments Incorporated
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