CDCE62005 Datasheet, PDF (11/76 Pages) Texas Instruments – Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62005
www.ti.com........................................................................................................................................................................................... SCAS862 – NOVEMBER 2008
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
V_CC
Supply voltage range⁽²⁾
V_I
Input voltage range⁽³⁾
V_O
Output voltage range⁽³⁾
Input Current (V_I < 0, V_I > V_CC)
Output current for LVPECL/LVCMOS Outputs (0 < V_O < V_CC)
T_J
Maximum junction temperature
T_stg
Storage temperature range
VALUE
-0.5 to 4.6
–0.5 to VCC + 0.5
–0.5 to VCC + 0.5
±20
±50
125
–65 to 150
UNIT
V
V
V
mA
mA
°C
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All supply voltages have to be supplied simultaneously.
(3) The input and output negative voltage ratings may be exceeded if the input and output clamp–current ratings are observed.
THERMAL CHARACTERISTICS
Package Thermal Resistance for QFN (RGZ) Package ^{(1) (2)}
AIRFLOW (lfm)
0
100
0
100
JEDEC Compliant Board (6X6 VIAs on PAD)
JEDEC Compliant Board (6X6 VIAs on PAD)
Recommended Layout (7X7 VIAs on PAD)
Recommended Layout (7X7 VIAs on PAD)
θ_JP (°C/W)⁽³⁾
2
2
2
2
θ_JA (°C/W)
28.9
20.4
27.3
20.3
(1) The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board).
(2) Connected to GND with 36 thermal vias (0,3 mm diameter).
(3) θ_JP (Junction – Pad) is used for the QFN Package, because the main heat flow is from the Junction to the GND-Pad of the QFN.
Copyright © 2008, Texas Instruments Incorporated
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