CDCE62005 Datasheet, PDF (24/76 Pages) Texas Instruments – Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62005
SCAS862 – NOVEMBER 2008........................................................................................................................................................................................... www.ti.com
Device Register N
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Last in /
Last out
SPI Register
Data Bits (28)
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Address
Bits
(4)
3 210
First In /
First Out
SPI Master (Host)
SPI_CLK
SPI_MOSI
SPI_MISO
SPI_LE
SPI Slave (CDCE62005)
SPI _CLK
SPI _MOSI
SPI _MISO
SPI _LE
SPI_CLK
SPI _MOSI
SPI _LE
SPI _MISO
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 3 2 1 0
Figure 19. CDCE62005 SPI Communications Format
CDCE62005 SPI Command Structure
The CDCE62005 supports four commands issued by the Master via the SPI:
• Write to RAM
• Read Command
• Copy RAM to EEPROM – unlock
• Copy RAM to EEPROM – lock
Table 4 provides a summary of the CDCE62005 SPI command structure. The host (master) constructs a Write to
RAM command by specifying the appropriate register address in the address field and appends this value to the
beginning of the data field. Therefore, a valid command stream must include 32 bits, transmitted LSB first. The
host must issue a Read Command to initiate a data transfer from the CDCE62005 back to the host. This
command specifies the address of the register of interest in the data field.
Table 4. CDCE62005 SPI Command Structure
Register Operation
0
1
2
3
4
5
6
7
8
Instruction
Instruction
Instruction
Write to RAM
Write to RAM
Write to RAM
Write to RAM
Write to RAM
Write to RAM
Write to RAM
Write to RAM
Status/Control
Read Command
RAM EEPROM
RAM EEPROM
NVM
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Unlock
Lock ⁽¹⁾
Data Field (28 Bits)
Addr Field
(4 Bits)
2222222211111111119876543210321 0
765432109876543210
XXXXXXXXXXXXXXXXXXXXXXXXXXXX0 0 0 0
XXXXXXXXXXXXXXXXXXXXXXXXXXXX0 0 0 1
XXXXXXXXXXXXXXXXXXXXXXXXXXXX0 0 1 0
XXXXXXXXXXXXXXXXXXXXXXXXXXXX0 0 1 1
XXXXXXXXXXXXXXXXXXXXXXXXXXXX0 1 0 0
XXXXXXXXXXXXXXXXXXXXXXXXXXXX0 1 0 1
XXXXXXXXXXXXXXXXXXXXXXXXXXXX0 1 1 0
XXXXXXXXXXXXXXXXXXXXXXXXXXXX0 1 1 1
XXXXXXXXXXXXXXXXXXXXXXXXXXXX1 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AAAA1 1 1 0
0000000000000000000000000001111 1
0000000000000000101000000011111 1
(1) CAUTION: After execution of this command, the EEPROM is permanently locked. After locking the EEPROM, device configuration can
only be changed via Write to RAM after power-up; however, the EEPROM can no longer be changed
24
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