CDCE62005 Datasheet, PDF (33/76 Pages) Texas Instruments – Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

CDCE62005
www.ti.com........................................................................................................................................................................................... SCAS862 – NOVEMBER 2008
Device Registers: Register 6
Table 11. CDCE62005 Register 6 Bit Definitions
SPI RAM BIT NAME
BIT BIT
RELATED DESCRIPTION/FUNCTION
BLOCK
0
A0
Address 0
1
A1
Address 1
2
A2
Address 2
3
A3
Address 3
4
0 SELVCO
VCO Core VCO Select, 0:VCO1(low range), 1:VCO2(high range)
5
1 SELPRESCA
6
2 SELPRESCB
VCO Core
VCO Core
PRESCALER Setting.
7
3 SELFBDIV0
VCO Core
8
4 SELFBDIV1
VCO Core
9
5 SELFBDIV2
VCO Core
10
6 SELFBDIV3
11
7 SELFBDIV4
VCO Core
VCO Core
FEEDBACK DIVIDER Setting
12
8 SELFBDIV5
VCO Core
13
9 SELFBDIV6
VCO Core
14 10 SELFBDIV7
VCO Core
15 11 RESERVED
—
Must be set to “0”
16
12 SEC_TERMSEL
Input Buffers
If Set to “0” Secondary Input Buffer Internal Termination Enabled
If set to “1” Secondary Internal Termination circuitry Disabled
17 13 SELBPDIV0
VCO Core
18 14 SELBPDIV1
VCO Core BYPASS DIVIDER Setting ( 6 settings + Disable + Enable)
19 15 SELBPDIV2
VCO Core
20 16 ICPSEL0
VCO Core
21 17 ICPSEL1
22 18 ICPSEL2
VCO Core
VCO Core
CHARGE PUMP Current Select
23 19 ICPSEL3
VCO Core
24 20 RESERVED
VCO Core Must be set to “0”
25 21 CPPULSEWIDTH VCO Core If set to 1=wide pulse, 0=narrow pulse
26 22 ENCAL
VCO Core
Enable VCO Calibration Command. To execute this command a rising edge must be
generated (i.e. Write a LOW followed by a high to this bit location). This will initiate a
VCO calibration sequence only if Calibration Mode = Manual Mode (i.e. Register 6 bit 27
is HIGH).
27 23 RESERVED
—
Must be set to “0”
28 24 AUXOUTEN
Output AUX Enable Auxiliary Output when set to “1”
29 25 AUXFEEDSEL
Output AUX
Select the Output that will driving the AUX Output;
Low for Selecting Output Divider “2” and High for Selecting Output Divider “3”
30 26 EXLFSEL
VCO Core
When Set to “1” External Loop filter is used.
When Set to “0” Internal Loop Filter is used.
31 27 ENCAL_MODE
PLL
Calibration
1: Calibration Mode = Manual Mode. In this mode, a calibration will be initiated if a rising
edge is asserted on ENCAL (Register 6 Bit 22).
0: Calibration Mode = Startup Mode.
0
1
1
0
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
Copyright © 2008, Texas Instruments Incorporated
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