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K4N56163QF Datasheet, PDF (8/73 Pages) Samsung semiconductor – 256Mbit gDDR2 SDRAM
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K4N56163QF-GC
256M gDDR2 SDRAM
Operating Temperature Condition
Symbol
Parameter
Rating
Units
Notes
TOPER
Operating Temperature
0 to 95
°C
1, 2, 3
1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions,
please refer to JESD51.2 standard.
2. At 0 - 85 °C, operation temperature range are the temperature which all DRAM specification will be supported.
3. At 85 - 95 °C operation temperature range, doubling refresh commands in frequency to a 32ms period ( tREFI=3.9 us ) is required,
and to enter to self refresh mode at this temperature range, an EMRS command is required to change internal refresh rate.
Input DC Logic Level
Symbol
VIH(DC)
VIL(DC)
Parameter
DC input logic high
DC input logic low
Min.
VREF + 0.125
- 0.3
Max.
VDDQ + 0.3
VREF - 0.125
Units
V
V
Notes
Input AC Logic Level
Symbol
VIH(AC)
VIL(AC)
Parameter
AC input logic high
AC input logic low
Min.
VREF + 0.250
-
Max.
-
VREF - 0.250
Units
V
V
Notes
AC Input Test Conditions
Symbol
VREF
VSWING(MAX)
SLEW
Condition
Input reference voltage
Input signal maximum peak to peak swing
Input signal minimum slew rate
Value
0.5 * VDDQ
1.0
1.0
Units
V
V
V/ns
Notes
1
1
2, 3
Notes:
1. Input waveform timing is referenced to the input signal crossing through the VIH/IL(AC) level applied to the device under test.
2. The input signal minimum slew rate is to be maintained over the range from VREF to VIH(AC) min for rising edges and the range
from VREF to VIL(AC) max for falling edges as shown in the below figure.
3. AC timings are referenced with input waveforms switching from VIL(AC) to VIH(AC) on the positive transitions and VIH(AC) to
VIL(AC) on the negative transitions.
VSWING(MAX)
delta TF
delta TR
Falling Slew =
VREF - VIL(AC) max
delta TF
Rising Slew =
< AC Input Test Signal Waveform >
VDDQ
VIH(AC) min
VIH(DC) min
VREF
VIL(DC) max
VIL(AC) max
VSS
VIH(AC) min - VREF
delta TR
-8-
Rev 1.6 (Apr. 2005)
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