K4N56163QF Datasheet, PDF (4/73 Pages) Samsung semiconductor – 256Mbit gDDR2 SDRAM

K4N56163QF-GC
PIN CONFIGURATION
Normal Package (Top View)
256M gDDR2 SDRAM
1
2
3
7
8
9
VDD
NC
VSS
A
VSSQ UDQS VDDQ
UDQ6 VSSQ UDM
B
UDQS VSSQ UDQ7
VDDQ UDQ1 VDDQ
C
VDDQ UDQ0 VDDQ
UDQ4 _VSSQ UDQ3
D
UDQ2 VSSQ UDQ5
VDD
NC
VSS
E
VSSQ LDQS VDDQ
LDQ6 VSSQ LDM
F
VDDQ ^LDQ1
VDDQ
G
LDQ4 _VSSQ
LDQ3
H
LDQS
VSSQ _LDQ7
VDDQ LDQ0 VDDQ
LDQ2 _{VSSQ LDQ5}
VDDL VREF
VSS
J
VSSDL CK
VDD
CKE
WE
K
RAS
CK
ODT
NC
BA0
BA1
L
CAS
CS
A10
A1
M
A2
A0
VDD
VSS
A3
A5
N
A6
A4
A7
A9
P
A11
A8
VSS
VDD
A12
NC
R
NC
NC
Notes:
VDDL and VSSDL are power and ground for the DLL. lt is recommended that they are isolated on the device from VDD,
VDDQ, VSS, and VSSQ.
Ball Locations
: Populated Ball
+ : Depopulated Ball
Top View
(See the balls through the Package)
123456789
A
+++
B
+++
C
+++
D
+++
E
+++
F
+++
G
+++
H
+++
J
+++
K₊
+++
L
+++
+
M₊
+++
N
+++
+
P₊
+++
R
+++
+
-4-
Rev 1.6 (Apr. 2005)