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K4N56163QF Datasheet, PDF (58/73 Pages) Samsung semiconductor – 256Mbit gDDR2 SDRAM
K4N56163QF-GC
Self Refresh Operation
256M gDDR2 SDRAM
The gDDR2 SDRAM device has a built-in timer to accommodate Self Refresh operation. The Self Refresh Command is
defined by having CS, RAS, CAS and CKE held low with WE high at the rising edge of the clock. ODT must be turned off
before issuing Self Refresh command, by either driving ODT pin low or using EMRS command. Once the Command is reg-
istered, CKE must be held low to keep the device in Self Refresh mode. When the gDDR2 SDRAM has entered Self
Refresh mode all of the external signals except CKE, are “don’t care”. Since CKE is an SSTL 2 input, VREF must be main-
tained during Self Refresh operation. The DRAM initiates a minimum of one one Auto Refresh command internally within
tCKE period once it enters Self Refresh mode. The clock is internally disabled during Self Refresh Operation to save
power. The minimum time that the gDDR2 SDRAM must remain in Self Refresh mode is tCKE. The user may change the
external clock frequency or halt the external clock one clock after Self-Refresh entry is registered, however, the clock must
be restarted and stable before the device can exit Self Refresh operation. Once Self Refresh Exit command is registered, a
delay equal or longer than the tXSNR or tXSRD must be satisfied before a valid command can be issued to the device.
CKE must remain high for the entire Self Refresh exit period tXSRD for proper operation. Upon exit from Self Refresh, the
gDDR2 SDRAM can be put back into Self Refresh mode after tXSRD expires. NOP or deselect commands must be regis-
tered on each positive clock edge during the Self Refresh exit interval. ODT should also be turned off during tXSRD. Upon
exit from Self Refresh, the gDDR2 SDRAM requires a minimum of one extra auto refresh command before it is put back
into Self Refresh mode.
T0
T1
T2
tCK
tCH tCL
CK
CK
CKE
T3
T4
T5
T6
tRP*
tAOFD
VIL(AC)
tIS
Tm
Tn
VIH(AC)
tIS
> = tXSNR
> = tXSRD
ODT
CMD
VIL(AC)
tIS
tIS tIH
VIH(AC) Self VIH(DC)
VIL(AC) Refresh VIL(DC)
NOP
NOP
NOP
Valid
- Device must be in the “All banks idle” state prior to entering Self Refresh mode.
- ODT must be turned off tAOFD before entering Self Refresh mode, and can be turned on again
when tXSRD timing is satisfied.
- tXSRD is applied for a Read or a Read with autoprecharge command
- tXSNR is applied for any command except a Read or a Read with autoprecharge command.
- 58 -
Rev 1.6 (Apr. 2005)