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HD64F3664BPV Datasheet, PDF (61/446 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer | |||
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Section 2 CPU
Table 2.7 Branch Instructions
Instruction
Bcc*
Size
â
Function
Branches to a specified address if a specified condition is true. The
branching conditions are listed below.
Mnemonic
Description
Condition
BRA (BT)
Always (true)
Always
BRN (BF)
Never (false)
Never
BHI
High
Câ¨Z=0
BLS
Low or same
Câ¨Z=1
BCC (BHS)
Carry clear
(high or same)
C=0
BCS (BLO)
Carry set (low)
C=1
BNE
Not equal
Z=0
BEQ
Equal
Z=1
BVC
Overflow clear
V=0
BVS
Overflow set
V=1
BPL
Plus
N=0
BMI
Minus
N=1
BGE
Greater or equal
NâV=0
BLT
Less than
NâV=1
BGT
Greater than
Zâ¨(N â V) = 0
BLE
Less or equal
Zâ¨(N â V) = 1
JMP
â
Branches unconditionally to a specified address.
BSR
â
Branches to a subroutine at a specified address.
JSR
â
Branches to a subroutine at a specified address.
RTS
â
Returns from a subroutine
Note: * Bcc is the general name for conditional branch instructions.
Rev. 6.00 Mar. 24, 2006 Page 31 of 412
REJ09B0142-0600
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