HD64F3664BPV Datasheet, PDF (326/446 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 17 EEPROM
2. Random Address Read
This is a read operation with defined read address. A random address read requires a dummy
write to set read address. The EEPROM receives a start condition, slave address + R/W code
(R/W = 0), memory address (upper) and memory address (lower) sequentially. The EEPROM
outputs acknowledgement "0" after receiving memory address (lower) then enters a current
address read with receiving a start condition again. The EEPROM outputs the read data of the
address which was defined in the dummy write operation. After receiving acknowledgement
"1" and a following stop condition, the EEPROM stops the random read operation and returns
to a standby state.
The random address read operation is shown in figure 17.6.
SCL
1 2 34 5 6 7891
8 91
89
1 2 34 5 6 7891
89
SDA
A15
A8
A7
A0
D7
D0
Start
condition
Slave address
R/W
ACK
Upper memory
address
ACK
lower memory
address
ACK
Start
condition
[Legend]
R/W: R/W code (0 is for a write and 1 is for a read),
ACK: acknowledge
Slave address
R ACK Read Data ACK
Stop
conditon
Figure 17.6 Random Address Read Operation
3. Sequential Read
This is a mode to read the data sequentially. Data is sequential read by either a current address
read or a random address read. If the EEPROM receives acknowledgement "0" after 1-byte
read data is output, the read address is incremented and the next 1-byte read data are coming
out. Data is output sequentially by incrementing addresses as long as the EEPROM receives
acknowledgement "0" after the data is output. The address will roll over and returns address
zero if it reaches the last address H'01FF. The sequential read can be continued after roll over.
The sequential read is terminated if the EEPROM receives acknowledgement "1" and a
following stop condition as the same manner as in the random address read.
The condition of a sequential read when the current address read is used is shown in figure
17.7.
Rev. 6.00 Mar. 24, 2006 Page 296 of 412
REJ09B0142-0600