HD64F3664BPV Datasheet, PDF (321/446 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 17 EEPROM
17.4.3 Start Condition
A high-to-low transition of the SDA input with the SCL input high is needed to generate the start
condition for starting read, write operation.
17.4.4 Stop Condition
A low-to-high transition of the SDA input with the SCL input high is needed to generate the stop
condition for stopping read, write operation.
The standby operation starts after a read sequence by a stop condition. In the case of write
operation, a stop condition terminates the write data inputs and place the device in an internally-
timed write cycle to the memories. After the internally-timed write cycle (t_WC) which is specified
as t_WC, the device enters a standby mode.
17.4.5 Acknowledge
All address data and serial data such as read data and write data are transmitted to and from in 8-
bit unit. The acknowledgement is the signal that indicates that this 8-bit data is normally
transmitted to and from.
In the write operation, EEPROM sends "0" to acknowledge in the ninth cycle after receiving the
data. In the read operation, EEPROM sends a read data following the acknowledgement after
receiving the data. After sending read data, the EEPROM enters the bus open state. If the
EEPROM receives "0" as an acknowledgement, it sends read data of the next address. If the
EEPROM does not receive acknowledgement "0" and receives a following stop condition, it stops
the read operation and enters a standby mode. If the EEPROM receives neither acknowledgement
"0" nor a stop condition, the EEPROM keeps bus open without sending read data.
Rev. 6.00 Mar. 24, 2006 Page 291 of 412
REJ09B0142-0600