HD64F3664BPV Datasheet, PDF (268/446 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 15 I²C Bus Interface (IIC)
15.3.2 Slave Address Register (SAR)
SAR selects the slave address and selects the communication format. SAR can be written and read
only when the ICE bit is cleared to 0 in ICCR.
Initial
Bit
Bit Name Value R/W Description
7
SVA6
0
R/W Slave Address 6 to 0
6
SVA5
0
R/W Sets a slave address
5
SVA4
0
R/W
4
SVA3
0
R/W
3
SVA2
0
R/W
2
SVA1
0
R/W
1
SVA0
0
R/W
0
FS
0
R/W Selects the communication format together with the
FSX bit in SARX. Refer to table 15.2.
15.3.3 Second Slave Address Register (SARX)
SARX stores the second slave address and selects the communication format. SARX can be
written and read only when the ICE bit is cleared to 0 in ICCR.
Initial
Bit
Bit Name Value R/W Description
7
SVAX6
0
R/W Slave Address 6 to 0
6
SVAX5
0
R/W Sets the second slave address
5
SVAX4
0
R/W
4
SVAX3
0
R/W
3
SVAX2
0
R/W
2
SVAX1
0
R/W
1
SVAX0
0
R/W
0
FSX
0
R/W Selects the communication format together with the FS
bit in SAR. Refer to table 15.2.
Rev. 6.00 Mar. 24, 2006 Page 238 of 412
REJ09B0142-0600