HD64F3664BPV Datasheet, PDF (228/446 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 14 Serial Communication Interface 3 (SCI3)
SCK3
External
clock
Baud rate generator
Clock
BRC
Transmit/receive
control circuit
Internal clock (φ/64, φ/16, φ/4, φ)
BRR
SMR
SCR3
SSR
TXD
TSR
TDR
RXD
RSR
RDR
[Legend]
RSR: Receive shift register
RDR: Receive data register
TSR: Transmit shift register
TDR: Transmit data register
SMR: Serial mode register
SCR3: Serial control register 3
SSR: Serial status register
BRR: Bit rate register
BRC: Bit rate counter
Figure 14.1 Block Diagram of SCI3
Interrupt request
(TEI, TXI, RXI, ERI)
14.2 Input/Output Pins
Table 14.1 shows the SCI3 pin configuration.
Table 14.1 Pin Configuration
Pin Name
SCI3 clock
SCI3 receive data input
SCI3 transmit data output
Abbreviation
SCK3
RXD
TXD
I/O
I/O
Input
Output
Function
SCI3 clock input/output
SCI3 receive data input
SCI3 transmit data output
Rev. 6.00 Mar. 24, 2006 Page 198 of 412
REJ09B0142-0600